Customer Reviews

Advanced ASIC Chip Synthesis: Using Synopsys Design Compiler and Primetime

5 star:		(4)
4 star:		(2)
3 star:		(0)
2 star:		(0)
1 star:		(5)

 

 

What you find in this book you can find in SOLD( Synopsys On Line Documentation). I do not think that fundamentally this book offers any added value over what you find on SOLD. One cant make the claim that the explanations are clearer either, SOLD does a pretty good job of explaining. On the timing analysis (Primetime) front there is no mention of latch based designs/timing rules at all.

In summary, if you are a student, you might find it useful, but its not worth the money, you probabaly can get a better understanding using the online documention. If you are a professional and want this as a reference, you will find it pretty disappointing.

This book offers nothing extra from Synopsys On-Line Documentation. It is simply over overpriced.

This book is very general even to readers who are unfamiliar with the topic. It is a waste of money. It is extremely short, I read the whole book in one day. It has bits and pieces here and there, but no fundamentals. This book is not useful, even to starters.

This book is extremely general. Even for readers who do not want to practice synthesis or timing analysis. It gives very few minor examples. It is not worth the money. I finished reading the book in 1 day. The information in this book is so shallow. I wasted my money. If you have access to the synopsys tools, it is much better to read the tools user guide.

I got turned off from this book the moment I opened it, and before I even read a single line. It has huge font size (even larger, instead of smaller, for example scripts) and one-inch margins on top and bottom. (An O'Reilly book has 40% more information on same-sized page, and it's far easier to read.) Every other sentence contains a punctuation error. All this makes it hard to concentrate on the content.

The content itself is good for the absolute beginner, but not much else. The example scripts have no useful comments. Several important concepts (wire-load models among them) are mentioned without explanation. Other concepts (such as false paths) are explained in a misleading way.

The author may be a superb designer, but that does not automatically make him a decent writer.

Also, shouldn't editors have caught the English language errors?

Here we are: Contents Foreword. Preface. Acknowledgements. About the Author. 1. ASIC Design Methodology. 2. Tutorial. 3. Basic Concepts. 4. Synopsys Technology Library. 5. Partitioning and Coding Styles. 6. Constraining Designs. 7. Optimizing Designs. 8. Design for Test. 9. Links to Layout & Post-Layout Optimization. 10. SDF Generation. 11. PrimeTime Basics. 12. Static Timing Analysis. Appendix. Index.

As an ASIC designer I found this to be useful when doing synthesis work. If you are experienced in synthesis, synopsys online documentation and personal notes may prove as useful. I simply liked this text. The price is really not that far out of norm for technical books such as this one.

In the real design world, experiences talked. This book came out with experiences, the whole book is fluent with design experiences and briefly explain the necessary conecpts to use the tools in the real design world. It is organized in a quite elegant way, and really helpful. However, I still wish there are more theoretical explanations behind the scenes, but that might need another books to aim at different purposes.

Finally a book that talks about the real-time application of the Synopsys tools to handle complex ASIC designs. It focuses on the real-world problems faced by the ASIC design community and offers various solutions to tackle these issues. It also elaborates on layout issues faced by the semiconductor industry today as we decend deep into the sub-micron realms. No other book comes close to this.

In the inner circles at Conexant, Himanshu is known as the Father of Modern ASIC Design. His experience shows in this book that Batty hasn't let his success go to his head. This book covers everything from modelling issues (where the author got his start) to hard core ASIC synthesis and layout issues. The chapters on timing convergence and static timing show some of the tricks of a true pro... you'd think he wrote the tools. The ASIC Fundamentalists would be proud.

This book will get so much use that I recommend buying two copies, as you will wear the first one out in no time. (You might even want to buy a third copy, to leave in your bathroom for light reading)