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Basic ESD and I/O Design [Hardcover]

Sanjay Dabral (Author), Timothy Maloney (Author)
3.5 out of 5 stars  See all reviews (2 customer reviews)

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Basic ESD and I/O Design Basic ESD and I/O Design 3.5 out of 5 stars (2)
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Book Description

0471253596 978-0471253594 November 30, 1998 1
The first comprehensive guide to ESD protection and I/O design

Basic ESD and I/O Design is the first book devoted to ESD (electrostatic discharge) protection and input/output design. Addressing the growing demand in industry for high-speed I/O designs, it bridges the gap between ESD research and current VLSI design practices and provides a much-needed reference for practicing engineers who are frequently called upon to learn the subject on the job.

This volume presents an integrated treatment of ESD, I/O, and process parameter interactions that both I/O designers and process designers can use. It examines key factors in I/O and ESD design and testing, and helps the reader consider ESD and reliability issues up front when making I/O choices. Emphasizing clarity and simplicity, this book focuses on design principles that can be applied widely as this dynamic field continues to evolve. Basic ESD and I/O Design:
* Describes strategies for design-oriented ESD protection
* Explains layout methods that enhance ESD protection designs
* Addresses basic I/O designs, including new problems such as mixed voltage interfaces
* Discusses fabrication aspects affecting ESD and I/O protection
* Illustrates concepts using numerous figures and examples
* Expresses device physics in terms of simple electrical circuit models
* Cross-references the material to standard texts in the field


Essential for engineers in industry and anyone designing circuits, systems, or devices for future technologies, Basic ESD and I/O Design is also a useful reference for researchers and graduate students involved in core VLSI design or computer architecture.

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From the Back Cover

The first comprehensive guide to ESD protection and I/O design

Basic ESD and I/O Design is the first book devoted to ESD (electrostatic discharge) protection and input/output design. Addressing the growing demand in industry for high-speed I/O designs, it bridges the gap between ESD research and current VLSI design practices and provides a much-needed reference for practicing engineers who are frequently called upon to learn the subject on the job.

This volume presents an integrated treatment of ESD, I/O, and process parameter interactions that both I/O designers and process designers can use. It examines key factors in I/O and ESD design and testing, and helps the reader consider ESD and reliability issues up front when making I/O choices. Emphasizing clarity and simplicity, this book focuses on design principles that can be applied widely as this dynamic field continues to evolve. Basic ESD and I/O Design:

  • Describes strategies for design-oriented ESD protection
  • Explains layout methods that enhance ESD protection designs
  • Addresses basic I/O designs, including new problems such as mixed voltage interfaces
  • Discusses fabrication aspects affecting ESD and I/O protection
  • Illustrates concepts using numerous figures and examples
  • Expresses device physics in terms of simple electrical circuit models
  • Cross-references the material to standard texts in the field

Essential for engineers in industry and anyone designing circuits, systems, or devices for future technologies, Basic ESD and I/O Design is also a useful reference for researchers and graduate students involved in core VLSI design or computer architecture.

About the Author

SANJAY DABRAL received his PhD in electrical engineering from Rensselaer Polytechnic Institute. An independent consultant, he is also involved in developing high-speed I/O buses.

TIMOTHY J. MALONEY has degrees in physics and electrical engineering from MIT and Cornell University. He is a Principal Engineer at Intel Corporation and has won the Intel Achievement Award for his patented ESD protection devices. A Senior Member of the IEEE, he has several patents issued and several more pending.

Product Details

  • Hardcover: 328 pages
  • Publisher: Wiley-Interscience; 1 edition (November 30, 1998)
  • Language: English
  • ISBN-10: 0471253596
  • ISBN-13: 978-0471253594
  • Product Dimensions: 9.5 x 6.4 x 0.9 inches
  • Shipping Weight: 1.3 pounds (View shipping rates and policies)
  • Average Customer Review: 3.5 out of 5 stars  See all reviews (2 customer reviews)
  • Amazon Best Sellers Rank: #1,899,708 in Books (See Top 100 in Books)

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3.5 out of 5 stars (2 customer reviews)
 
 
 
 
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12 of 13 people found the following review helpful:
4.0 out of 5 stars A good book on I/O design!, May 19, 1999
This review is from: Basic ESD and I/O Design (Hardcover)
Today it is hard to find a book dealing with ESD and IO design comprehensively, and this book is a make-up. It covers ESD theories, prevention techniques and layout, basic IO transceiver design, mixed-voltage IO cell design and etc. Unfortunately, the authors did not address some of the designs in depth, as its title is "Basic ESD and I/O Design".
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7 of 9 people found the following review helpful:
3.0 out of 5 stars review Basic ESD and I/O Design, July 15, 2000
This review is from: Basic ESD and I/O Design (Hardcover)
If you are designing i/o design this is the book that you want to have. After reviewing basic concepts provided by the book, you can improve your esd io sturecture by a few 1kv. It has excellent design examples for ESD I/O from grounded gate MOS devices to SCR. This book however needs to address low capacitance ESD I/O sturecture for RF application.
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Inside This Book (learn more)
First Sentence:
In the previous chapter, a method based on "current path" to protect against ESD was briefly discussed. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
bootstrap heating, cascaded diodes, power supply coupling diodes, ballasting action, snapback voltage, diode chain, power supply clamps, second breakdown voltage, core power supply, core clamp, charged device model, punchthrough voltage, mixed voltage, normal circuit operation, power supply impedance, slew rate control, diode string, substrate tap, peripheral supply, core circuits, epi thickness, trigger voltage, core supplies, stress voltage, inverting stages
Key Phrases - Capitalized Phrases (CAPs): (learn more)
New York, Integrated Circuits, Time Figure, Integrated Circuit Metal, Melt Damage, Scaling Laws, Ensuring Uniform Current Flow, Failure Threshold of Silicided, Kluwer Academic, N-well P-epi, Sensitivity Testing, Study of Gated, Analysis of High-Density Logic Chips, Association Standard, Avoid Oxide Failure, Intel Corp, Physics of Semiconductor Devices, Sub-Micron Silicided, Typ Min Max, Van Nostrand Reinhold, Vds Figure, Vtt Ron
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