This book presents both fundamentals and the state of the art of PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, Sigma Delta fractional-N synthesizer prototype is implemented in 0.35m m CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which tackle speed and integration bottlenecks of PLL synthesizer elegantly. This book is conceived as a PLL synthesizer manual for both academia researchers and industry design engineers.
CMOS PLL Synthesizers
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CMOS PLL Synthesizers: Analysis and Design presents both fundamentals and state of the art PLL synthesizer design and analysis techniques. A complete overview of both system-level and circuit-level design and analysis are covered. A 16mW, 2.4GHz, sub-2V, S D fractional-N synthesizer prototype is implemented in 0.35mm CMOS. It features a high-speed and robust phase-switching prescaler, and a low-complexity and area-efficient loop capacitance mulitplier, which elegantly tackle speed and integration bottlenecks of PLL synthesizer. This book is useful as a PLL synthesizer manual for both academic researchers and industry design engineers.
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1 of 1 people found the following review helpful:
3.0 out of 5 stars
Good book but narrow scope,
This review is from: CMOS PLL Synthesizers: Analysis and Design (The Springer International Series in Engineering and Computer Science) (Kindle Edition)
This is a great book if you just want to build a frequency synthesizer for RF Kind of applications. However, it doesn't do much else.
For instance, the author doesn't do a good job on frequency dividers, which could be a big chapter by itself. Likewise not much emphasis on different ways to do oscillators, theory behind it etc. etc. I use it because it gives a good reference on the mathematical equations for phase margin, Xover frequency etc. My background: I have 15yr experience doing analog IC design.
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Inside This Book
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First Sentence:
In the last decade, the rapid growth of wireless applications has led to an increasing demand of fully integrated, low-cost, low-power, and high-performance transceivers. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
linear phase locking, divide ratio range, rising edge propagation delay, normalized phase error, standard digital cells, switching prescaler, capacitance multiplier, passive loop filter, reference spur, phase noise model, fractional spurs, instantaneous phase error, fractional divider, output phase noise, phase noise requirement, locking time, noise folding, spur level, delay mismatch, frequency synthesizer, current mismatch, synthesizer design, frequency divider, loop bandwidth, divider output Key Phrases - Capitalized Phrases (CAPs): (learn more)
Solid-State Circuits, Circuits Syst, Custom Integrated Circuits Conf, New York, University of California, Distribution Figure, Ideal Cap, Microwave Theory Tech, Prentice Hall, San Diego, Cap Multiplier, Frequency Control Symp, Phase Figure, Solid-Stale Circuits New!
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Front Cover | Table of Contents | First Pages | Back Cover | Surprise Me!
In the last decade, the rapid growth of wireless applications has led to an increasing demand of fully integrated, low-cost, low-power, and high-performance transceivers. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
linear phase locking, divide ratio range, rising edge propagation delay, normalized phase error, standard digital cells, switching prescaler, capacitance multiplier, passive loop filter, reference spur, phase noise model, fractional spurs, instantaneous phase error, fractional divider, output phase noise, phase noise requirement, locking time, noise folding, spur level, delay mismatch, frequency synthesizer, current mismatch, synthesizer design, frequency divider, loop bandwidth, divider output Key Phrases - Capitalized Phrases (CAPs): (learn more)
Solid-State Circuits, Circuits Syst, Custom Integrated Circuits Conf, New York, University of California, Distribution Figure, Ideal Cap, Microwave Theory Tech, Prentice Hall, San Diego, Cap Multiplier, Frequency Control Symp, Phase Figure, Solid-Stale Circuits New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Back Cover | Surprise Me!
Citations (learn more)
This book cites 4
books:
- The Design of Low Noise Oscillators by Ali Hajimiri on page 27, and page 179
- Phase-Locked Loop Circuit Design by Dan H. Wolaver on page 29
- Digital Signal Processing (4th Edition) by John G. Proakis on page 125
- Frequency Synthesis by Phase Lock by William F. Egan on page 27
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