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Computer Architecture, Fifth Edition: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design) 5th Edition

82 customer reviews
ISBN-13: 978-0123838728
ISBN-10: 012383872X
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Computer Architecture, Fifth Edition: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design) + Introduction to Algorithms, 3rd Edition + Computer Organization and Design, Fifth Edition: The Hardware/Software Interface (The Morgan Kaufmann Series in Computer Architecture and Design)
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Editorial Reviews

Amazon.com Review

The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. The fifth edition of Computer Architecture focuses on this dramatic shift, exploring the ways in which software and technology in the cloud are accessed by cell phones, tablets, laptops, and other mobile computing devices. Each chapter includes two real-world examples, one mobile and one data center, to illustrate this revolutionary change.

  • Updated to cover the mobile computing revolution.
  • Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.
  • Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next").
  • Includes three review appendices in the printed text. Additional reference appendices are available online.
  • Includes updated case studies and completely new exercises.

New this Edition
  • Each chapter includes two new, real-world examples, one mobile and one data center, to illustrate the revolutionary change to personal mobile devices and cloud computing.
  • Expanded and improved coverage of multicore and GPU architectures.
  • Completely new chapters on warehouse-scale (cloud) computers (Chapter 6) and vector processors and GPUs (Chapter 4).
  • New "Putting it All Together" sections exploring real-world applications, including the pipeline organizations and memory hierarchies of the ARM Cortex A8 processor; the Intel core i7 processor; the NVIDIA GTX-280 and GTX-480 GPUs; and warehouse-scale computing at Google.
  • Improvements and updates throughout, including updated performance analysis data featuring the new SPECPower benchmark.

Review

"What has made this book an enduring classic is that each edition is not an update, but an extensive revision that presents the most current information and unparalleled insight into this fascinating and fast changing field. For me, after over twenty years in this profession, it is also another opportunity to experience that student-grade admiration for two remarkable teachers." - From the Foreword by Luiz André Barroso, Google, Inc.

"This is an academic textbook that is also suitable for a far broader readership. Each chapter is organised in the same structure, with the main content supported by case studies and exercises… Having read this book I now have a far better understanding of why processors from all the different designers and manufacturers are so different. Memory hierarchies, multicore architectures and compiler optimisation are all covered in great detail. I was particularly interested in their discussion of graphical processing units and how they are suitable for far more than just graphical workloads… What is great about this book is that it moves with the times. There is a lot of content on processors for mobile computing, and power usage is a pervasive theme. At the other extreme there is an excellent chapter on warehouse scale computers, which offers tremendous insight into the cloud computing infrastructure provided by Google, Amazon and others. If your job has anything to do with IT infrastructure then I recommend this book as a must-read. As an academic text book it has both depth and breadth. And if you're just interested in the topic you'll gain a huge amount of insight into the fundamentals of computer architecture."--The Chartered Institute for IT

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Product Details

  • Series: The Morgan Kaufmann Series in Computer Architecture and Design
  • Paperback: 856 pages
  • Publisher: Morgan Kaufmann; 5 edition (September 30, 2011)
  • Language: English
  • ISBN-10: 012383872X
  • ISBN-13: 978-0123838728
  • Product Dimensions: 9.1 x 7.5 x 1.8 inches
  • Shipping Weight: 4 pounds (View shipping rates and policies)
  • Average Customer Review: 4.1 out of 5 stars  See all reviews (82 customer reviews)
  • Amazon Best Sellers Rank: #7,456 in Books (See Top 100 in Books)

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Customer Reviews

Most Helpful Customer Reviews

80 of 91 people found the following review helpful By Read and think on October 20, 2011
Format: Paperback
It appears that this book was rushed out by the publisher, *unfinished*.

Core subjects that would normally be chapters in other books, such as "Computer Arithmetic", "Storage Systems", "Large-scale multiprocessors", "Survey of Instructions Set", etc (nine chapters in total ), have been relegated to an "Online Appendices" status, which is a misnomer because as of 2011/10/20 they don't exist at all, even online (a terse "coming soon" appearing on the website).

My suggestions: don't buy the book now, wait until the missing chapters are published and appears in print in the book itself.

If you buy the book now, you will only be able to read a lot of chapters as ".pdf" when they get published, not a pleasant experience in my opinion, and you will also contribute to encourage publishers in this bad practice.

To give you an idea of how bad it is, the number of non-printed chapters (9) is the same as the number of printed chapters (6 + 3 "appendices") and if we can trust the authors themselves: "There are more pages in these appendices (the non-printed ones) than there is in this book" (preface p xvi) !

[Update: 2011/11/01: the appendices are now present on the books web site in pdf. But still no printed paper version of the appendices available or announced]
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26 of 28 people found the following review helpful By Derek D. Simmons on January 31, 2013
Format: Paperback
The first and second editions described how to evaluate and determine what gives systems performance advantages over others. They got down to the real nuts and bolts of a system and described what made one optimal over others. Recent editions seem to be promoting current trends and technologies. I think one of the reasons for more editions in shorter periods of time is because a lot of the technologies they are examining don't have any real substance or staying power. The other reason I have been staying away from using recent releases is the reliance on web content. If I buy or recommend a book I expect it to be a whole book and not half of it dependent on web content that can disappear at a moments notice. If I wanted to recommend a website I will recommend a website and NOT a book. What would be nice is if they got back to the basics of what really makes one system more optimal, faster, than another with a historical perspective. Why computer architecture evolved following one path over another.
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16 of 18 people found the following review helpful By Brian Connors VINE VOICE on December 22, 2011
Format: Paperback Vine Customer Review of Free Product ( What's this? )
I'm not even sure what to make of a textbook this big -- so big that large swaths of it are available only online. There's certainly more material in here than can productively be covered in a single semester.

The authors were the creators of the MIPS architecture, and although it's no longer the big fish in the tank it's still common enough that it makes a good sample architecture for computer architecture classes. (You would, for example, run into it in cable boxes, some video game consoles, and network hardware.) Needless to say, MIPS gets a lot of case study in here. The book also covers other architectures (in greater detail in the online appendices), but not so much as to be confusing. But it's right about the part where it gets into vector processing that it starts to feel a bit like drinking from a firehose. The book also covers GPUs (a rather important part of most modern desktop computers) and the ins and outs of system and memory control.

But the tsunami really hits when you jump straight into warehouse-level computing -- the massive data clusters run by companies like Google, Apple, and Amazon to provide computing infrastructure for their customers. It feels like you're going in the deep end -- jumping straight past basic clustering directly into issues of real-world architecture and power distribution. This is interesting stuff, but it feels like it's drifting into another course entirely. And the appendices... oh so many, only three of which (largely information on instruction set architecture, which the authors felt was less relevant than in earlier versions of the book) are included in the book itself.
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5 of 5 people found the following review helpful By C. De La Paz III on January 24, 2014
Format: Paperback
First of all, I'd like to point out that this book is a 'classic' in that it is pretty comprehensive. If you are a grad EE/CS in computer architecture then it's definitely a must read.

Having said that, my main problem with this book is that its horribly organized. And I do mean HORRIBLY organized.

Chapter 3 is just as bad as it gets! The authors spread tons of different topics throughout the 150+ page chapter and they somehow want to tie them all to "ILP". Are they completely wrong in doing that? Probably not, these topics do have to do with ILP. However, do you expect an author to cover volleys, serves, groundstrokes, overheads, scoring, and tennis clothing all in one single chapter of a tennis book. No!

To illustrate how disorganized the chapter is (and the whole book), notice all the topics they cover in one chapter, Chapter 3 and how they are all over the place:

Order of topics in Chapter 3:

1) Data hazards (basics already in the appendix). Why don't just cover data hazards ALL in one section?
2) Branch predictors (basics already in appendix). They somehow decided that the slightly more advance two-level predictor should go here.
3) Register Renaming using Tomasulo algorithm (several pages). Tomasulo hasn't been used in ages, a paragraph would have sufficed in my opinion.
4) VLIWs, EPIC
5) Branch predictors (again! x2). This second time they cover BTBs. Such an easy concept I don't understand why it is not in their appendix along with the basics of branch predictors.
6) Renaming (again! x2). This time they cover Register Renaming through ROBs.
7) Superscalar
8) Branch predictors (AGAIN! x3). This third time they cove branch speculation, and return address prediction (RAS).
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Computer Architecture, Fifth Edition: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design)
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