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Computer Vision: Specialized Processors for Real-Time Image Analysis: Workshop Proceedings Barcelona, Spain, September 1991 (ESPRIT Basic Research Series)
 
 
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Computer Vision: Specialized Processors for Real-Time Image Analysis: Workshop Proceedings Barcelona, Spain, September 1991 (ESPRIT Basic Research Series) [Hardcover]

Eduard Montseny (Editor), Joan Frau (Editor)

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Hardcover, September 29, 1994 $107.00  

Book Description

3540570160 978-3540570165 September 29, 1994 1
Computer vision falls short of human vision in two respects: execution time and intelligent interpretation. This book addresses the question of execution time. It is based on a workshop on specialized processors for real-time image analysis, held as part of the activities of an ESPRIT Basic Research Action, the Working Group on Vision. The aim of the book is to examine the state of the art in vision-oriented computers. Two approaches are distinguished: multiprocessor systems and fine-grain massively parallel computers. The development of fine-grain machines has become more important over the last decade, but one of the main conclusions of the workshop is that this does not imply the replacement of multiprocessor machines. The book is divided into four parts. Part 1 introduces different architectures for vision: associative and pyramid processors as examples of fine-grain machines and a workstation with bus-oriented network topology as an example of a multiprocessor system. Parts 2 and 3 deal with the design and development of dedicated and specialized architectures. Part 4 is mainly devoted to applications, including road segmentation, mobile robot guidance and navigation, reconstruction and identification of 3D objects, and motion estimation.

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Inside This Book (learn more)
First Sentence:
Optimization in computer vision architectures is a very complex issue. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
corner response suppression, transputer subsystem, host transputer, associative processor array, input field store, size normalisation, pipeline controller, corner finder, shift memory, optimal couple, tag route, edge tangential, ternary digits, adjacent chips, cellular logic, scalar unit, virtual array, processor structure, radial scan, virtual operation, transfer memory, corner detector, corner detection, specialized processors, texture function
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Communications Network, Academic Press, Brunel University, Vector Data Buffer, Elsag Bailey, Intelligent Autonomous Systems, Intelligent Motion Control, New York, Supervisor Cpu, Advanced Micro Devices, Final Year Report, International Workshop, Pin Function, Robotics Research
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