Software-based cryptography can be used for security applications where data traffic is not too large and low encryption rate is tolerable. But hardware methods are more suitable where speed and real-time encryption are needed. Until now, there has been no book explaining how cryptographic algorithms can be implemented on reconfigurable hardware devices. This book covers computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The author emphasizes the practical aspects of reconfigurable hardware design, explaining the basic mathematics involved, and giving a comprehensive description of state-of-the-art implementation techniques.
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This book covers the study of computational methods, computer arithmetic algorithms, and design improvement techniques needed to implement efficient cryptographic algorithms in FPGA reconfigurable hardware platforms. The concepts and techniques reviewed in this book will make special emphasis on the practical aspects of reconfigurable hardware design, explaining the basic mathematics related and giving a comprehensive description of state-of-the-art implementation techniques. The authors show how high-speed cryptographic algorithms implementations can be achieved on reconfigurable hardware devices without posing prohibited high requirements for hardware resources. The material in this book will be of interest to engineering professionals, programmers, hardware designers, and graduate students interested in the development of security and cryptographic mechanisms at a beginning/intermediate level.
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elliptic curve cryptography, binary finite field arithmetic, reconfigurable hardware, modern cryptography, digital signature schemes, point halving, inverse operation, hardware description languages, configurable logic blocks, sub block message, encryptor core, two multiplier blocks, implementing block ciphers, decryptor core, field squaring operation, initial hash values, reconfigurable hardware technology, binary extension fields, doubling primitive, elliptic curve scalar multiplication, modular exponentiation operation, modern block ciphers, field square root, field exponentiation, reconfigurable hardware devices Key Phrases - Capitalized Phrases (CAPs): (learn more)
Prime Finite Field Arithmetic, Brief Introduction, Modular Multiplication Operation, Xilinx Virtex, Advanced Encryption Standard, Cores Satoh, Look Up Tables, Mathematical Background, S-box Look-up, Time Delay, Data Encryption Standard, Round Basic Transformations, Binary Exponentiation Require, Implementations Author, Addition Operation, Repeat Operation, Field Programmable Gate Arrays, Define Word, Mbps Fastest, Field Square Root Computation, The Rijndael Algorithm, Stage Stage Stage, Signature Verification Require, Xilinx Foundation Series, Function Output New!
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elliptic curve cryptography, binary finite field arithmetic, reconfigurable hardware, modern cryptography, digital signature schemes, point halving, inverse operation, hardware description languages, configurable logic blocks, sub block message, encryptor core, two multiplier blocks, implementing block ciphers, decryptor core, field squaring operation, initial hash values, reconfigurable hardware technology, binary extension fields, doubling primitive, elliptic curve scalar multiplication, modular exponentiation operation, modern block ciphers, field square root, field exponentiation, reconfigurable hardware devices Key Phrases - Capitalized Phrases (CAPs): (learn more)
Prime Finite Field Arithmetic, Brief Introduction, Modular Multiplication Operation, Xilinx Virtex, Advanced Encryption Standard, Cores Satoh, Look Up Tables, Mathematical Background, S-box Look-up, Time Delay, Data Encryption Standard, Round Basic Transformations, Binary Exponentiation Require, Implementations Author, Addition Operation, Repeat Operation, Field Programmable Gate Arrays, Define Word, Mbps Fastest, Field Square Root Computation, The Rijndael Algorithm, Stage Stage Stage, Signature Verification Require, Xilinx Foundation Series, Function Output New!
Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
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