Design Verification with e [Paperback]

Samir Palnitkar (Author)

Book Description

ISBN-10: 0131413090 | ISBN-13: 978-0131413092 | Publication Date: October 5, 2003 | Edition: 1

E is a new Hardware Verification Language, or HVL. Verification is one of the most time consuming and cumbersome processes in hardware design. Design teams spend 50% to 70% of their time verifying designs, rather than creating new ones. As designs grow more complex, the verification problems increase exponentially - when a design doubles in size, the verification effort can easily quadruple. In the past design teams have used Verilog and VHDL. E gives engineers the speed and efficiency they have been craving, while also allowing for simulation of other components as well. This book emphasizes breadth rather than depth. It imparts to the reader a working knowledge of a broad variety of e-based topics, thus giving the reader a global understanding of e-based design verification. This book should be classified not only as an e book but, more generally, as a design verification book. Due to its popularity, it is likely that e will be standardized in the future.

Editorial Reviews

From the Back Cover

Design Verification with eSamir Palnitkar

Written for both experienced and new users, DesignVerification with e gives you a broadcoverage of e. It stresses the practical verification perspective of e rather than emphasizing only itslanguage aspects.

This book—

• Introduces you to e-based verification methodologies
• Describes e syntax in detail, including structs, units, methods, events, temporal expressions. and TCMs
• Explains the concepts of automatic generation, checking and coverage
• Discusses the e Reuse Methodology
• Describes essential topics such as coverage driven verification, e verification components (eVCs), and interfacing with C/C++
• Illustrates a complete verification example in e
• Contains a quick-reference guide to the e language
• Offers many practical verification tips

Includes over 250 illustrations, examples, andexercises, and a verification resource list. Learning objectives and summariesare provided for each chapter.

“Mr. Palnitkar illustrates how and why the power ofthe everification language and the underlying Specman Elite testbench automationtool are used to develop today's most advanced verification environments. Thisbook is valuable to both the novice and the experienced e user. I highlyrecommend it to anyone exploring functional verification”

—Moshe Gavrielov

Chief Executive Officer

Verisity Design, Inc.

“This book demonstrates how e can be used to createstate-of-the-art verification environments. An ideal book to jumpstarta beginner and a handy reference for experts”

—Rakesh Dodeja

Engineering Manager

Intel Corporation

“The book gives a simple, logical, and well-organizedpresentation of ewith plenty of illustrations. This makes it an ideal text book for universitycourses on functional  verification”

—Dr. Steven Levitan

 Professor

 Department of Electrical Engineering

 University of Pittsburgh, Pittsburgh, PA

“This book is ideal for readers with little or no e programming experience. It gives the reader athorough and practical understanding of not only the e language, but also how to effectively use thislanguage to develop complex functional verification environments.”

—Bill Schubert

Verification Engineer

ST Microelectronics, Inc.

“The flow of the book is logical and gradual. Plentyof illustrations and examples makes this an ideal book for e users. A must-have for both beginners andexperts”

—Karun Menon

Staff Engineer

Sun Microsystems, Inc.

PRENTICEHALL

ProfessionalTechnical Reference

UpperSaddle River, NJ  07458

www.phptr.com

ISBN:0-13-144309-0

About the Author

About the Author

Samir Palnitkar is the President of Jambo Systems, Inc., a leading ASIC design and verificationservices company and a Verisity Verification Alliance partner. He previously founded IntegratedIntellectual Property, Inc., an ASIC company that was acquired by Lattice Semiconductor, Inc.,and Obongo, Inc., an e-commerce software firm that was acquired by AOL Time Warner, Inc. Heholds a Bachelor of Technology in Electrical Engineering from the Indian Institute ofTechnology, Kanpur; a Master's in Electrical Engineering from the University of Washington,Seattle; and an MBA degree from San Jose State University, San Jose, California. Heis a recognized authority on e, Verilog HDL, modeling, verification, logic synthesis, andEDA-based methodologies in digital design. He has worked extensively with design andverification on various successful microprocessor, ASIC, and system projects; worked on manye-based projects; and trained hundreds of students on e since 1997.

See all Editorial Reviews

Product Details

• Paperback: 416 pages
• Publisher: Prentice Hall; 1 edition (October 5, 2003)
• Language: English
• ISBN-10: 0131413090
• ISBN-13: 978-0131413092
• Product Dimensions: 9.5 x 7.4 x 1.2 inches
• Shipping Weight: 1.4 pounds (View shipping rates and policies)
• Average Customer Review: 4.0 out of 5 stars  See all reviews (2 customer reviews)
• Amazon Best Sellers Rank: #583,149 in Books (See Top 100 in Books)

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Customer Reviews

Most Helpful Customer Reviews

4.0 out of 5 stars Good book, but need more examples....., November 12, 2007

By 

Pranav Rastogi (Palo Alto, CA) - See all my reviews
(REAL NAME)   

This review is from: Design Verification with e (Paperback)

needs more real world examples and updates with CD would be great...good basic book though, for other reference use IEEE resources

1 of 3 people found the following review helpful:

4.0 out of 5 stars Well written book, March 4, 2009

By 

Frederic GHIS "Ghisfr" (Paris, France) - See all my reviews

This review is from: Design Verification with e (Paperback)

There is no free or demo software tool to practice specman e. That's bad for all learners.