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Designing Digital Computer Systems with Verilog
 
 
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Designing Digital Computer Systems with Verilog [Hardcover]

David J. Lilja (Author), Sachin S. Sapatnekar (Author)
1.5 out of 5 stars  See all reviews (2 customer reviews)

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Book Description

052182866X 978-0521828666 January 17, 2005
Using Verilog, a leading commercial hardware description language, this text describes how to specify, design, and test a complete digital system. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. The remainder of the book demonstrates how both behavioral and structural models can be developed and intermingled in Verilog.

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Editorial Reviews

Book Description

This book describes how to specify, design, and test a complete digital system using Verilog, a leading commercial hardware description language. After a brief introduction to the Verilog language, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined. This ISA is used throughout the remainder of the book to demonstrate how both behavioral and structural models can be developed and intermingled in Verilog. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practicing engineers.

About the Author

DAVID LILJA received his PhD in Electrical Engineering from the University of Illinois at Urbana-Champaign. He is currently a Professor of Electrical and Computer Engineering , and a Fellow of the Minnesota Supercomputing Institute, at the University of Minnesota in Minneapolis. He also serves as a member of the graduate faculties in Computer Science and Scientific Computation, and was the founding Director of Graduate Studies for Computer Engineering. He has served on the program committees of numerous conferences and as associate editor for IEEE Transactions on Computers. David is a Senior member of the IEEE and a member of the ACM.

SACHIN SAPATNEKAR received his PhD from the University of Illinois at Urbana-Champaign. Currently, he is the Robert and Marjorie Henle Professor in the Department of Electrical and Computer Engineering at the University of Minnesota, and serves on the graduate faculty in Computer Science and Engineering. He has served as Associate Editor for several IEEE journals, a distinguished visitor for the IEEE Computer Society and a distinguished lecturer for the IEEE Circuits and Systems Society. He is a recipient of the NSF Career Award and the SRC Technical Excellence Award. He is a Fellow of the IEEE and a member of the ACM.

Product Details

  • Hardcover: 176 pages
  • Publisher: Cambridge University Press (January 17, 2005)
  • Language: English
  • ISBN-10: 052182866X
  • ISBN-13: 978-0521828666
  • Product Dimensions: 10 x 6.9 x 0.6 inches
  • Shipping Weight: 1.2 pounds (View shipping rates and policies)
  • Average Customer Review: 1.5 out of 5 stars  See all reviews (2 customer reviews)
  • Amazon Best Sellers Rank: #833,824 in Books (See Top 100 in Books)

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5 of 5 people found the following review helpful:
2.0 out of 5 stars Too incomplete., August 8, 2005
By 
D. Gorodchanin (Leesburg, VA USA) - See all my reviews
(REAL NAME)   
This review is from: Designing Digital Computer Systems with Verilog (Hardcover)
Unfortunately, this book is more of an overview book. Don't expect to get any of the subjects presented fully explained. Some of the really important topics (like hazard detection) are only briefly mentioned. For the price it should have been at least twice as big and much more detailed.
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3 of 4 people found the following review helpful:
1.0 out of 5 stars do not waste your money, September 3, 2005
This review is from: Designing Digital Computer Systems with Verilog (Hardcover)
The author claims that he covered in this book what other test books failed to do. He claims that this book can be used to design a processor from start to finish. Unfortunately I bought this book and was hoping to find a detailed explanation on how to design a mini processor. After reviewing the book, I concluded that this book is a waste of money and time. For example, the book talks too much about verilog basics but did not provide a block diagram or a top level for the VeSPA processor which is used in the book. For the money I paid I was expecting to find a useful example of a mini processor design.
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Inside This Book (learn more)
First Sentence:
The goal of this text is to teach you how to design a processor from scratch. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
rdst field, condition code bits, fetch task, mov operation, opcode bits, jump target address, branch target address, pipeline bubbles, input operands, literal field, mov instruction, conditional branch instructions, destination register, immediate operand, assembly language programmer, code notation, opcode field, initial begin, nop instruction, immediate address, source operands, test vectors, pipelined processor, pipeline registers, instruction set architecture
Key Phrases - Capitalized Phrases (CAPs): (learn more)
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