This reference for the ADSP-2100 family is an architectural and code-compatible set of 16-bit fixed-point DSP microprocessors that offer varying levels of feature integration. It offers fast, flexible arithmetic for all computations including the multiply-accumulate, extended dynamic range in computations to minimize scaling, trunkation, and slipping, program sequencing with zero-overhead looping, dual data address generation with circular buffering and bit-reversed addressing, and three-bus Harvard architecture enabling single-cycle fetch of both instruction and two data values.
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This book bridges the gap between digital signal-processing (DSP) algorithms and their real-world implementations on state-of-the-art digital signal processors.
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This guide brings together a host of digital signal processing (DSP) algorithms and their real-world implementations on the ADSP-2100 family of DSP chips. It provides an understanding of how a DSP processor such as the ADSP-2100 is used to solve problems by performing floating-point math on a fixed-point processor, creating a digital filter program, and producing a fast Fourier transform. This reference offers DSP applications for professionals working with the ADSP-2100 family of processors.
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