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Digital Systems Design with VHDL and Synthesis: An Integrated Approach
 
 
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Digital Systems Design with VHDL and Synthesis: An Integrated Approach [Hardcover]

K. C. Chang (Author)
4.0 out of 5 stars  See all reviews (11 customer reviews)

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Book Description

0769500234 978-0769500232 April 27, 1999 1
K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together.

Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.

Unique features of the book include the following:

  • VHDL code explained line by line to capture the logic behind the design concepts
  • Simulation waveforms, synthesized schematics, and results are shown, verified, and analyzed
  • VHDL code is synthesized and commands and strategies are discussed
  • Variations on the design techniques and common mistakes are addressed
  • Demonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study
  • Test bench, post-layout verification, and test vector generation processes are illustrated

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Editorial Reviews

From the Back Cover

K.C. Chang presents an integrated approach to digital design principles, processes, and implementations to help the reader design increasingly complex systems within shorter design cycles. Chang introduces digital design concepts, VHDL coding, VHDL simulation, synthesis commands, and strategies together.

Digital Systems Design with VHDL and Synthesis focuses on the ultimate product of the design cycle: the implementation of a digital design. Many of the design techniques and considerations illustrated in the text are examples of actual real-world designs.

Unique features of the book include the following:

  • VHDL code explained line by line to capture the logic behind the design concepts
  • Simulation waveforms, synthesized schematics, and results are shown, verified, and analyzed
  • VHDL code is synthesized and commands and strategies are discussed
  • Variations on the design techniques and common mistakes are addressed
  • Demonstrated standard cell, gate array, and FPGA three design processes, each with a complete design case study
  • Test bench, post-layout verification, and test vector generation processes are illustrated

About the Author

K.C. Chang received his BS degree in Electrical Engineering from National Taiwan University in 1979. His MS and PhD degrees in computer science were earned at the University of Minnesota in 1984 and 1986. Later in 1986 he joined the Boeing Company where he teaches VHDL and synthesis courses in addition to his regular responsibilities of computer-aided design algorithm development, VHDL, synthesis and ASIC design. He has designed several ASICs with VHDL and synthesis including DSP and RISC 32-bit floating point microprocessors. He also gives conference tutorials on these same subjects. He earned his MBA degree at the City University in 1992. Dr. Chang holds 3 US patents. He has been an associate technical fellow at Boeing and an affiliate associate professor at the University of Washington Electrical Engineering Department since 1997.

Product Details

  • Hardcover: 516 pages
  • Publisher: Wiley-IEEE Computer Society Pr; 1 edition (April 27, 1999)
  • Language: English
  • ISBN-10: 0769500234
  • ISBN-13: 978-0769500232
  • Product Dimensions: 10.4 x 7.4 x 1.2 inches
  • Shipping Weight: 2.3 pounds (View shipping rates and policies)
  • Average Customer Review: 4.0 out of 5 stars  See all reviews (11 customer reviews)
  • Amazon Best Sellers Rank: #1,413,393 in Books (See Top 100 in Books)

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Customer Reviews

11 Reviews
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4 star:
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3 star:
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2 star:
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Average Customer Review
4.0 out of 5 stars (11 customer reviews)
 
 
 
 
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Most Helpful Customer Reviews

18 of 20 people found the following review helpful:
5.0 out of 5 stars The best book I have read on VHDL so far!, July 16, 1999
By A Customer
This review is from: Digital Systems Design with VHDL and Synthesis: An Integrated Approach (Hardcover)
The book organization is unique in that the codes are all complete from beginning to end with line numbers. The author explains the relevant codes line by line. However, as the book progresses, he explains less details of the codes. Another unique feature (the best feature) is that every code comes with synthesized circuits along with synthesis commands of how to optimize for different goals (i.e. best timing or best area). The practical examples are real life examples (i.e. microprocessor, FIFO, FIR filter, DRAM etc.) The reader will also get design fundamentals of the above examples. Overall, an excellent book!
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12 of 13 people found the following review helpful:
5.0 out of 5 stars Who needs this book, and when?, August 17, 2001
By 
Gehong Zeng (Santa Barbara, CA United States) - See all my reviews
When first starting VHDL, I picked up this book and found it somewhat hard to follow. After some initial reading, I had to give up and put it on the shelf, and then began looking for other easy books to read. One after another, I finally bought a dozen of VHDL books, some of which I wished I had not. Among these books, I found that Andrew Rushton's "VHDL for Logic Synthesis 2nd" is a wonderful beginner's reading; I got some VHDL coding skills with "Essential VHDL, RTL Syntheses Done Right" by Sundar Rajan; Peter Ashenden's "Designer's Guide to VHDL" is good, but too thick to read from cover to cover; Kevin Skahill taught me important programmable logic concept with "VHDL for Programmable Logic"...

After all these books, I still felt uncertain, lack of something. Then I came to understand that I needed some good real world design examples, something real, not just demo. I took this book again from the shelf, Woo, totally different now! This was what I needed now. The author doesn't waste time telling me which is better, Verilog or VHDL, or which is the more useful package, std_logic_arith or numeric_std. He just shows me with excellent examples what real world engineers do in their projects; so I gradually understand what I will do in face with real world problems. By now I learnt to know that when possible I'll use std_logic_arith package in my design in spite of its proprietary, because by doing so one can get rid of worrying about type conversions at the ports, and therefore avoid possible mistakes in the code; I know how to use logic hiding, source sharing, variable using skills to get better designs.

The author provides more examples in his new book: "Digital Systems Design With Vhdl and Synthesis: An Integrated Approach", but after reading them over and again, I still think the first book is better. In my opinion, it's really concise and to the point. Though there are some minor problems with it, such as incomplete references, lack of important package listings, I give it solid five stars!

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7 of 7 people found the following review helpful:
4.0 out of 5 stars Great Reference, not for beginners, June 7, 2000
By 
This review is from: Digital Systems Design with VHDL and Synthesis: An Integrated Approach (Hardcover)
This book is not for beginners. It seems great as a reference, with clear examples and good discussion on each line of the examples. Along with the associated synthesized logic diagrams, it helps make the examples clear. The minuses are that he jumps right into an example, with no help as to how to write VHDL files, setup, or other help. You must know already how to write basic VHDL. Also, as with most books that have great content, the index is very poor.
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Inside This Book (learn more)
First Sentence:
Digital circuit primitive gates are basic building components such as AND, NAND, NOR, and INVERTER used by synthesis tools to construct designs. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
synthesized schematic, clock network delay, net interconnect area, combinational area, data required time, postlayout timing simulation, std logic, basic combinational circuits, data arrival time, library setup time, postlayout verification, simulation waveform, logic vector, following shows part, interrupt pending register, synthesis script, short path problem, equality checker, total cell area, implied bit, clock uncertainty, interrupt request register, port map, microprogram counter, synthesis commands
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Basic Sequential Circuits, Point Incr Path, Fixed-Point Division, Synthesis Environment, Chip Express, Finite Impulse Response Filter, Floating-Point Arithmetic, Hold Hold, Booth-Wallace Tree Multiplier Synthesis, Cell Reference Library Area, Computer Society Press, Cond Jump, Design Optimization, Design Wire Loading Model Library, Dynamic Random Access Memory, Microprogram Controller Design, Multiple Outputs, Signal Manipulator, Path Group, Path Type, Pop Hold, Synopsys Design Compiler
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