Customer Reviews

Hdl Chip Design: A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog

5 star:		(9)
4 star:		(6)
3 star:		(2)
2 star:		(3)
1 star:		(1)

 

 

I am a designer who has worked heavily in both VHDL and Verilog. I have read the other VHDL/Verilog books by Ashenden, Armstrong, Perry, Skahill, and Palnitkar, and this is the definitely the best. It shows by example major concepts you can't get from acedemic texts.

The most important thing about this book is the way it shows you how the synthesis tool interprets your code, which is the single most important aspect of VHDL/Verilog coding. It saves you the frustration of finding out by trial and error, and shows you ways of avoiding nasty synthesis problems.

This book is a must for any serious designer's library, and great for starters as well.

It is a good book for reference because it has VHDL and Verilog code side by side. It is really helpful if you know one language and want to carry on with another HDL language. The synthesis result listed for each circuit is also helpful for understand what the circuit really up to. But there are some errors in the book, like mis-use of blocking and none-blocking assignment. Do not take the example code as correct for granted. You can try it out in any simulator and see how many error you can catch. Overall, it is good reference, just do not take the examples too seriously.

You get this book when you buy Veribest software and since we teach several hundred students with Veribest tools we looked seriously at this book. In the end we rejected it. Its good points are there are lots of examples and it uniquely teaches both VHDL and Verilog concurrently (although we only intend to teach one). Its weak points are really that it teaches nothing other than how to write fragments of VHDL code. No understanding is given of how and why synthesis tools work, what the effect is on complexity or performance of different coding styles nor of overall design methodologies for constructing systems (as opposed to sub components) also there is no future look into developments or issues in synthesis and IC/FPGA design. So we didn't feel that using this book gave our students any long term knowledge or deep understanding of the subject. If all you want to do is write VHDL/Verilog fragments, the book is OK. Otherwise it demonstrates too much and educates too little.

As the only book comparing Verilog and VHDL implementations, of the same design, line by line, it is indespensible for chip designers who must quickly master the "other" RTL language. I have also found it useful, though not overwhelming the competition so authoritatively, for refreshing one's memory of the Verilog/VHDL syntax after an absence.

This is a must-have reference for the consultant or experienced designer who needs to know both VHDL and Verilog. Makes an outstanding gift for those having to make the transition. It is less good, but acceptable, as a first introduction to RTL design.

I'm not-so-old-hands software engineer with EE background and what I really needed is a fast-pace reference book (a cookbook, if you want...) for VHDL with none of academic-style high-level discussion nor freshman-level ground-up definitions. This is a must-have book which provides strightforward information about effective usage of VHDL and Verilog language, with many examples given in concurrent VHDL nad Verilog form followed by synthesized circuit schematics. Both combinatorial and sequential (synchronous) circuits are well covered, as well as advanced topics like modeling finite-state machines and writing test harnesses. This is a must for every serious hw/sw designer.

This book fills a void found in HDL litterature once you try to get beyond the syntax of Verilog and VHDL. The problem is that it encourages a really bad and dangerous design style for synchronous Verilog. Debugging the possible race conditions resulting from the use of blocking statements is a nightmare. It should be considered the eleventh deadly sin (actually worse than some of the ten original ones). The result I've seen is that engineers new to HDL are tempted to copy indiscriminately from the book, without understanding the subtle rules used in the coding examples. If you understand the rules, you probably don't need this book.

Most HDL (VHDL/Verilog) books deal mainly with simulation. But this books deals only with how your HDL code is converted to hardware (gates and flip-flops). VHDL/Verilog are compared side by side to build a design.

I had trouble understanding the initial chapters as the author's language is very vague and skims over the subject. The author could improve the book by rewriting the *ALL* sentences in the book in a simple and straight forward way. Some typos are unbelievable: the word "COURSE" is used in dozens of places instead of "COARSE".

Each hdl code is followed by a diagram showing the synthesized hardware. Unfortunately, this diagram consists solely of gates and flip-flops. This makes it hard to read the diagram. Instead of displaying a mux as two gates, they could be shown as the mux symbol, thereby making the diagrams readable.

Listen, do you want to learn VHDL or/and VERILOG fast, efficiently and without going out of your mind?...this is the book. Not much theory, for that buy Ashenden's book, with the two, you will be set, theory and practice...perfect combination!!

This book is filled with working examples of both Verilog and VHDL. In my opinion it is one of the best books on the subject of HDL design on the market. Not only do you learn, but since the book uses VHDL and Verilog, you can decide which one you prefer to work with.

I ignored the VHDL stuff because I'm learning Verilog. I found it to be a great book especially because the book shows what all the examples synthesize to. Since this book isn't too good as a reference (missing lots of stuff), I'm also using 'Verilog Hdl : A Guide to Digital Design and Synthesis'. I don't really like the examples in this one, but it works as a reference.