Explaining how HTS is able to explore the synthesis freedom provided at high-level to derive an inherently testable architecture at low or even no overhead, this text provides an introduction to HTS and helps develop an understanding of this emerging technology by presenting a background of HTS terms, operation scheduling and resource allocation algorithms. The book also covers various HTS techniques for scan and built-in self-test methodologies, register-transfer level test synthesis, examples of several effective HTS schemes for highly testable digital circuits, and more.
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About the Author
Dr. Mike Tien-Chien Lee is a software engineer at Avant! Corp. He holds a Ph.D. in electrical engineering from Princeton University. Dr. Lee serves on program committees of IEEE International Test Synthesis Workshop. He received Best Paper Awards at the Asia and South Pacific Design Automation Conference (ASP-DAC) in 1995, and the IEEE/ACM Design Automation Conference (DAC) in 1996.
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4.0 out of 5 stars
Very useful,
By Doaa Nassar (Egypt) - See all my reviews
This review is from: High-Level Test Synthesis of Digital VLSI Circuits (Hardcover)
The book contains the concepts of the most recently researches in the area of high level test synthesis. This book offers me the basic knowledge, that enable me to get complete benefit from the other publications in this topic. The book also contains alot of illustrative examples, and figures and this make it easier to the reader .
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