PCI was originally designed to be used in a wide range of systems from notebooks to high-end servers. There are now a wide range of new buses being developed to replace PCI, which enable cost-savings, performance enhancement, and specialized features. HyperTransport is a new bus that deals specifically with chipset interconnect, the high-speed link between the memory and IO controller chips. HyperTransport Architecture allows hardware and low-level software designers, engineers, and technicians to get up to speed quickly on this new bus protocol, without having to wade through specifications and white papers. The book organizes topics in a logical, tutorial format which quickly guides the reader through the major features of the specification. Numerous diagrams and examples reduce the more complicated concepts to manageable proportions and allow the reader to see the important relationships along the way.
FREE Two-Day Shipping for students on millions of items. Learn more |
Book Description
Special Offers and Product Promotions
- Buy $50 in qualifying physical textbooks, get $5 in Amazon MP3 Credit. Here's how (restrictions apply)
Frequently Bought Together
Editorial Reviews
From the Back Cover
HyperTransport™ (HT) technology promises to revolutionize connectivity for computers, servers, embedded systems, and networking and tele-communications equipment. It is a high-speed, low latency, point-to-point, packetized link that enables chips to transfer data at peak rates of up to 12.8 Gigabytes per second, far greater than existing bus technologies. Furthermore, HyperTransport improves reliability and reduces board design complexity. It is scalable and compatible with legacy PC buses, SNA, and PCI.
HyperTransport™ System Architecture provides a comprehensive, technical guide to HyperTransport technology. It opens with an overview of HT systems, highlighting the technology's fundamental principles, basic architecture, and its many advantages. The book goes on to detail all facets of HyperTransport systems, including the protocol, I/O, routing, configuration, and more. It also features important performance considerations and addresses critical compatibility issues.
Essential topics covered include:
- Signal groups
- Packet protocol, covering control and data packets
- HT flow control, and how it differs from PCI flow control
- I/O ordering rules, including upstream, downstream, and host ordering requirements
- Interrupts, error detection, and error handling
- HT system management
- Routing packets, covering point-to-point topology and HT's fairness algorithm
- Device configuration
- The electrical environment, including power requirements and signaling characteristics
- HyperTransport bridges
- Double-hosted chains
- Anticipated networking extensions
- PCI, PCI-X, AGP, and X86 compatibility issues
A chapter is dedicated to transaction examples illustrating the practical application of HyperTransport technology.
A MindShare PC System Architecture Series book, HyperTransport™ System Architecture provides complete, authoritative, and detailed information necessary for developers, networking professionals, and anyone interested in implementing and deploying HT systems.
MindShare's PC System Architecture Series is a crisply written and comprehensive set of guides to the most important PC hardware standards. Books in the series are intended for use by hardware and software designers, programmers, and support personnel. Each title explains the architecture, features, and operations of systems built using one particular type of chip or hardware specification.
0321168453B02032003
About the Author
MindShare, Inc. is one of the leading technical training companies in the hardware industry, providing innovative courses for dozens of companies, including Intel, IBM, and Compaq.
Jay Trodden has a background as an electrical engineer and computer hardware designer. For the past five years, he has been an instructor for MindShare.
Don Anderson is the author of many MindShare books. He passes on his wealth of experience in digital electronics and computer design by training engineers, programmers, and technicians for MindShare.
0321168453AB07142003
Product Details
Would you like to update product info or give feedback on images?
|
More About the Author
Discover books, learn about writers, read author blogs, and more.
Customer Reviews
|
Share your thoughts with other customers:
|
||||||||||||||||||||||
|
Most Helpful Customer Reviews
1 of 2 people found the following review helpful:
5.0 out of 5 stars
Very Clear and Concise,
This review is from: HyperTransport™ System Architecture (Paperback)
Far easier to read than the pedantic HT spec, and actually contains transaction examples, which is all anyone ever really needs.
4 of 10 people found the following review helpful:
5.0 out of 5 stars
hypertransport very well written,
By A Customer
This review is from: HyperTransport™ System Architecture (Paperback)
This book is very well written and not "dry" like many of it's technical counterparts. This book covers fascinating new technology in an easy to understand format.
Share your thoughts with other customers: Create your own review
|
|
Inside This Book
(learn more)
First Sentence:
This chapter discusses some of the motivations leading to the development of HyperTransport. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
sync flood, subtractive decoder, target start address, flow control counters, receive clock domain, cold reset, fence request, configuration space registers, interrupt request message, one host bridge, system management controller, prefetchable memory, compatibility chain, cave devices, reconnect sequence, redirection register, transmit clock domain, subtractive decode agent, sized write, flow control buffers, bit command code, interrupt request packet, target dword, warm reset, system management interrupt Key Phrases - Capitalized Phrases (CAPs): (learn more)
Link Config, Link Freq Cap, Bit Function, Link Error, Limit Upper, Mem Base Upper, Freq Revision, Slave Command, Host Command, Interrupt Destination, Secondary Status, Capability Type, End of Interrupt, Bits Upper, Controller Hub, Fatal Interrupt Byte, Start Address Field, System Architecture, Example Protocol, Networking Extensions Overview, Transaction Type, Capabilities List, Deadlock Scenario, Initialization Complete, Interface Example New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
This chapter discusses some of the motivations leading to the development of HyperTransport. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
sync flood, subtractive decoder, target start address, flow control counters, receive clock domain, cold reset, fence request, configuration space registers, interrupt request message, one host bridge, system management controller, prefetchable memory, compatibility chain, cave devices, reconnect sequence, redirection register, transmit clock domain, subtractive decode agent, sized write, flow control buffers, bit command code, interrupt request packet, target dword, warm reset, system management interrupt Key Phrases - Capitalized Phrases (CAPs): (learn more)
Link Config, Link Freq Cap, Bit Function, Link Error, Limit Upper, Mem Base Upper, Freq Revision, Slave Command, Host Command, Interrupt Destination, Secondary Status, Capability Type, End of Interrupt, Bits Upper, Controller Hub, Fatal Interrupt Byte, Start Address Field, System Architecture, Example Protocol, Networking Extensions Overview, Transaction Type, Capabilities List, Deadlock Scenario, Initialization Complete, Interface Example New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
Citations (learn more)
This book cites 4
books:
1
book
cites this book:
- Plug and Play System Architecture by MindShare Inc. in Front Matter
- Protected Mode Software Architecture by MindShare Inc. in Front Matter
- CardBus System Architecture by MindShare Inc. in Front Matter
- Universal Serial Bus System Architecture (2nd Edition) by MindShare Inc. in Front Matter
Books on Related Topics
(learn more)
|
What Other Items Do Customers Buy After Viewing This Item?
Tag this product(What's this?)Think of a tag as a keyword or label you consider is strongly related to this product.
Tags will help all customers organize and find favorite items. |
Sell a Digital Version of This Book in the Kindle Store
If you are a publisher or author and hold the digital rights to a book, you can sell a digital version of it in our Kindle Store.
Learn more
Customer Discussions
|
This product's forum
Active discussions in related forums
Search Customer Discussions
|
Related forums
|
