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Intel Threading Building Blocks: Outfitting C++ for Multi-core Processor Parallelism 1st Edition

3.8 out of 5 stars 6 customer reviews
ISBN-13: 978-0596514808
ISBN-10: 0596514808
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Editorial Reviews

About the Author

James Reinders, Chief Evangelist of Intel Software Products, is a senior engineer who joined Intel Corporation in 1989 and has contributed to a number of projects, including the world's first TeraFLOP supercomputer (ASCI Red), compilers and architecture work for the iWarp, Pentium Pro, Pentium II, Itanium, and Pentium 4 processors. He has years of experience in processor architecture, optimizing compilers, parallel computer architecture, and making products for software developers.

Reinders is also the editorial columnist for the monthly "The Gauntlet" at www.devX.go-parallel.com, as well as the author of the Intel Press book titled "VTune Performance Analyzer Essentials" and contributor to the new book "Multi-Core Programming."

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Product Details

  • Paperback: 336 pages
  • Publisher: O'Reilly Media; 1 edition (July 22, 2007)
  • Language: English
  • ISBN-10: 0596514808
  • ISBN-13: 978-0596514808
  • Product Dimensions: 7 x 0.7 x 9.2 inches
  • Shipping Weight: 1.1 pounds (View shipping rates and policies)
  • Average Customer Review: 3.8 out of 5 stars  See all reviews (6 customer reviews)
  • Amazon Best Sellers Rank: #434,743 in Books (See Top 100 in Books)

More About the Author

James Reinders is a senior engineer who joined Intel Corporation in 1989 and has contributed to projects including systolic arrays systems WARP and iWarp, the world's first TeraFLOP/s supercomputer (ASCI Red), the world's first TeraFLOP/s microprocessor (Intel Xeon Phi Coprocessor, code name Knights Corner), as well as compilers and architecture work for multiple Intel processors and parallel systems. James has been a driver behind the development of Intel as a major provider of software development products, and serves as their chief software evangelist. James is currently involved in multiple efforts at Intel to bring parallel programming models to the industry including for the Intel MIC architecture. James received his B.S.E. in Electrical and Computing Engineering and M.S.E. in Computer Engineering from the University of Michigan.

Customer Reviews

Top Customer Reviews

Format: Paperback
There are many views of how best to implement multi-threading and with multi-core processors now common the topic is becoming ever more relevant. Of course the best implementation method really depends on what you are trying to do. Are you implementing something that waits for a price update message from a derivatives exchange, parses the message, updates cached data, writes a log and forwards the message on to an algorithmic trading engine? If so, you'll probably be attracted to techniques different from someone calculating risk, bond prices etc. There is no one technique that suits every job.

Anyone working with multi-threading (and parallelism in general) keeps an eye on what techniques other people are using to see whether they may be useful. That's why I bought this book (Intel Threading Building Blocks) and TBB certainly looks like it will be of use for some multi-threaded applications that I develop, although not for all.

Starting with the most important question - have I learnt anything from reading this book. Yes, and I've learnt a couple of bits from reading the TBB source code too (downloadable from the web). Now for the detail...

Having read the book, am I now about to start using the Intel Threading Building Blocks library (downloadable from Intel)? The answer is yes, for some applications on some hardware architectures, but not for all of my multi-threaded applications. Importantly in terms of this book though, the first reason I looked at the TBB source code was to answer questions raised when reading the book, and that is my main issue with this book. For a developer who already has extensive multi-threading experience, this book raises quite a few questions that it doesn't answer.
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I agree with Hardman's review as far as it goes -- the book cannot go into as much detail as he would like since it is designed to be cross platform (and surprisingly also applicable to other similar chips e.g., AMD).

On the other hand, this book opens you up to an important area: how can you use a small number of cores to speed up your program, including those programs that appear serial at first (and maybe second) glance e.g., the cumulative sum of a vector.

The book has a lot of depth on the algorithms used and works through applications of differing complexity and varied domains.

As an extra bonus it provides annotated pointers to its intellectual predecessors, albeit not as extensive as Hillis' book.The Connection Machine (Artificial Intelligence)
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I think, this book is the complementary manual of Intel's TBB documents.
Because Intel provides some documents (tutorial, getting started, reference, design pattern) and example codes in the TBB package, but it could be somewhat difficult to find the sample code for all of TBB features like concurrent_*(queue, hash_map, vector) or TBB's task modules.

Although it proposes a good philosophy of concurrency but lacks concepts or diagrams to explain its codes parts.

A good example book.
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