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Introduction to Reconfigurable Computing: Architectures, Algorithms, and Applications [Hardcover]

Christophe Bobda (Author)
2.0 out of 5 stars  See all reviews (1 customer review)

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Book Description

November 9, 2007 1402060882 978-1402060885 1
This work is a comprehensive study of the field. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field, from the early Estrin’s machine to the very modern architecture such as embedded logic devices.

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Review

The book by Christophe Bobda, however, has also been written for people with a software background, substantially reducing the educational leap by bridging the gap. His book has the potential to become a best-seller and to stimulate the urgently needed transformation of the software developer population’s mind set, by playing a similar role as known from the famous historic Mead-&-Conway textbook for the VLSI design revolution. Reiner Hartenstein, IEEE fellow, Professor, TU Kaiserslautern "

From the Back Cover

“Introduction to Reconfigurable Computing” provides a comprehensive study of the field Reconfigurable Computing. It provides an entry point to the novice willing to move in the research field reconfigurable computing, FPGA and system on programmable chip design. The book can also be used as teaching reference for a graduate course in computer engineering, or as reference to advance electrical and computer engineers. It provides a very strong theoretical and practical background to the field of reconfigurable computing, from the early Estrin’s machine to the very modern architecture like coarse-grained reconfigurable device and the embedded logic devices. Apart from the introduction and the conclusion, the main chapters of the book are the following: -Architecture of reconfigurable systems, which presents the technology and the architecture used in fine-grained and those used in coarse-grained reconfigurable devices. -Design and implementation: This section deals with the implementation on reconfigurable system. It briefly covers the steps needed to implement application on today's FPGAs. And focus on the logic synthesis for FPGA, in particular LUT technology mapping. -High-Level Synthesis for Reconfigurable Devices: The high-level synthesis for reconfigurable systems, also known as temporal partitioning is presented here. Several temporal partitioning techniques are presented and explained. -Temporal placement: This section considers stand alone reconfigurable systems. Its assume that a kind of operating systems for reconfigurable systems is in charge of managing the resources of a given system and allocate space on a device for the computation of incoming tasks., and therefore presents several temporal placement approaches for off-line as well as on-line placement. -On-line and Dynamic Interconnection: This chapter reviews and explains the different approaches for allowing communication between modules dynamically placed at run-time on a given device. -Designing a reconfigurable application on Xilinx Virtex FPGA: In this section, the different design approaches of partial reconfigurable systems on the Xilinx FPGAs that are one of the few on the market with this feature, are explained. -System on programmable chip: System on programmable chip is a hot topic in reconfigurable computing. This is mainly the integration of a system made upon some peripheral (UART, Ethernet, VGA, etc.), but also computational (Coding, filter, etc.) hardware modules on one programmable chip. The current usable solutions are presented: The book furthermore focuses on the development of adaptive multiprocessors on chip, i.e. systems consisting of a set of Processors and exchangeable hardware accelerators. -Applications: This part covers the use of reconfigurable system in computer architecture (rapid prototyping, reconfigurable supercomputer, reconfigurable massively parallel computers) and algorithm better adapted for reconfigurable systems (distributed arithmetic, network packet processing, etc...).

Product Details

  • Hardcover: 388 pages
  • Publisher: Springer; 1 edition (November 9, 2007)
  • Language: English
  • ISBN-10: 1402060882
  • ISBN-13: 978-1402060885
  • Product Dimensions: 9.3 x 6.4 x 0.8 inches
  • Shipping Weight: 1.7 pounds (View shipping rates and policies)
  • Average Customer Review: 2.0 out of 5 stars  See all reviews (1 customer review)
  • Amazon Best Sellers Rank: #3,133,430 in Books (See Top 100 in Books)

 

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2 of 2 people found the following review helpful:
2.0 out of 5 stars Computing, but without the computations, December 27, 2007
This review is from: Introduction to Reconfigurable Computing: Architectures, Algorithms, and Applications (Hardcover)
In some ways, this book offers the most thorough introduction to reconfigurable computing (RC) that I've seen. It starts with the platforms themselves, from Estrin's work around 1960 up to this year's Virtex 5 family of FPGAs. That discussion includes mainstream technologies, as well as recent explorations into coarse-grained and other architectures and a few of the commercially failed ideas that have arisen over time.

The next two chapters address basic issues in logic synthesis, at the gate level and datapath level. No one intro can cover the entire literature of the field, but this goes into mathematically proven depth in a few important algorithms. Two more chapters (5 and 7) address re-use the computing fabric over time, first as a formal exercise combining geometric constraints with temporal dependencies and then as a pragmatic exercise in terms of current chips and tools. Despite the amount of research attention that partial reconfiguration has gotten, tools are still crude and researchy. Instead of a commercial tool flow, expect to find a series of isolated puddles. Two more chapters (6 and 8) address system-on-chip issues. Finally, chapter 9 devotes about 30 pages to RC applications - or does it?

Really, it just names the applications and mentions a bit of why reconfigurability suits them. It doesn't go into much depth about the computations themselves. Even then, the discussion has more multiprocessor-on-chip flavor than any real sense of what makes FPGA-based RC truly different from von Neumann. I don't think the term "systolic array" appears anywhere.

I suppose it depends on what you want. Tool-builders will find a solid intro that works forward from a cold start. They'll see familiar compilation technologies applied in distinctive ways, with plenty of references for anyone in need of details. They'll see many of the unique problems in swapping parts of the computation on and off a working chip. RC practitioners take synthesis for granted though - synthesis algorithms hold only incidental interest. Partial reconfiguration, as the author emphasizes it, works only on one or two of the most recent chip famiies from Xilinx, and not at all on the Altera chips that are becoming more common in the RC arena. Applications focus on the embedded - media, signal processing, and the like - with scant mention of performance computing, my central interest. Although wide-ranging and well-researched, I have trouble imagining the RC practitioner who will take this book to the lab bench.

-- wiredweird
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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
reconfigurable architectures, online communication, partial reconfiguration design, temporal placement problem, initial budgeting phase, chortle algorithm, modular design flow, temporal partitioning problem, bus macros, hash register, unconstrained scheduling, reconfigurable devices, partial bitstream, ucf file, reconfigurable modules, full bitstream, reconfigurable computing, packing classes, mobility interval, reconvergent paths, bridging edge, reconfigurable parts, free rectangles, distributed arithmetic, online placement
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Xilinx Virtex, Erlangen Slot Machine, The Actel, Von Neumann, Inf Inf, The Quicksilver, Reconfigurable Systems
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Front Cover | Table of Contents | First Pages | Index | Surprise Me!
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