Low-Energy FPGAs: Architecture and Design is a primary resource for both researchers and practicing engineers in the field of digital circuit design. The book addresses the energy consumption of Field-Programmable Gate Arrays (FPGAs). FPGAs are becoming popular as embedded components in computing platforms. The programmability of the FPGA can be used to customize implementations of functions on an application basis. This leads to performance gains, and enables reuse of expensive silicon. Chapter 1 provides an overview of digital circuit design and FPGAs. Chapter 2 looks at the implication of deep-submicron technology onFPGA power dissipation. Chapter 3 describes the exploration environment to guide and evaluate design decisions. Chapter 4 discusses the architectural optimization process to evaluate the trade-offs between the flexibility of the architecture, and the effect on the performance metrics. Chapter 5 reviews different circuit techniques to reduce the performance overhead of some of the dominant components. Chapter 6 shows methods to configure FPGAs to minimize the programming overhead. Chapter 7 addresses the physical realization of some of the critical components and the final implementation of a specific low-energy FPGA. Chapter 8 compares the prototype array to an equivalent commercial architecture.
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Inside This Book
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First Sentence:
Integrated circuits in the form of Application Specific Integrated Circuits (ASICs) and General-Purpose (GP) processors traditionally have been used to meet the computational needs for processing information. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
logic block granularity, logic block structure, interconnect energy, weighted graph representation, shift register method, dedicated functional units, interconnect architecture, toggle frequency, logic capacity, box flexibility, random access technique, clock energy, performance accelerator, routing segments, interconnect resources, clock distribution network, configuration overhead, logic blocks, routing resources, energy overhead, routing switches, connection box, routing channel, configuration bits, energy breakdown Key Phrases - Capitalized Phrases (CAPs): (learn more)
Symmetric Mesh, Viterbi Accelerator, Barrel Shifter, Field-Programmable Gate Arrays, The Splash New!
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Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
Integrated circuits in the form of Application Specific Integrated Circuits (ASICs) and General-Purpose (GP) processors traditionally have been used to meet the computational needs for processing information. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
logic block granularity, logic block structure, interconnect energy, weighted graph representation, shift register method, dedicated functional units, interconnect architecture, toggle frequency, logic capacity, box flexibility, random access technique, clock energy, performance accelerator, routing segments, interconnect resources, clock distribution network, configuration overhead, logic blocks, routing resources, energy overhead, routing switches, connection box, routing channel, configuration bits, energy breakdown Key Phrases - Capitalized Phrases (CAPs): (learn more)
Symmetric Mesh, Viterbi Accelerator, Barrel Shifter, Field-Programmable Gate Arrays, The Splash New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
Citations (learn more)
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cites this book:
- The Steiner Tree Problem (Annals of Discrete Mathematics) by Frank K. Hwang in Back Matter
- Electrical Engineering: Objective Type by S.S. Gupta in Front Matter
- Flows in Networks (Rand Corporation Research Studies Series) by L. R. Ford in Back Matter
- Digital Systems Engineering by William J. Dally in Back Matter
- Field-Programmable Gate Arrays (The Springer International Series in Engineering and Computer Science) by Stephen D. Brown in Back Matter
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