Customer Reviews

MIPS RISC Architecture (2nd Edition)

This, the second edition, tries to expand on that, but does a stunningly poor job. While is has been expanded slightly to cover some R6000 and R4000 topics (e.g. some changes to the CP0 architecture), it fails horribly at describing at crucial elements of the R4000. For instance: the fact that the R4000 is a 64-bit CPU. Very few of the instructions that first appeared in the R4000 are described, and in particular the 64-bit CPU instructions seem to be omitted entirely. Worse, some of the text, e.g., relating to CP1 (FPU) data types and registers, which was perfectly clear in the first edition has been muddied by generalizing it for R6000/R4000. The result is that this edition fails to present a clear picture of *either* the R2000/R3000 or later MIPS processors.

If you're interested in learning about MIPS architecture, even historical (R2000/R3000) MIPS architecture, I'd suggest looking elsewhere: See MIPS Run is quite good (but not excellent in my opinion) and covers a wide range of topics. The first edition of this book is an excellent reference about R2000/R3000, but is limited to them. The MIPS architecture documentation manuals from MIPS themselves tend to be clear and complete references, but lacking in background information. I'd bet that many other MIPS-related books are great. But this one isn't.