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Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design)
 
 

Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design) [Hardcover]

Jim Handy (Author)
5.0 out of 5 stars  See all reviews (3 customer reviews)

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Book Description

January 27, 1998 0123229804 978-0123229809 2
The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techniques. It leads readers through someof the most intricate protocols used in complex multiprocessor caches. Written in an accessible, informal style, this text demystifies cache memory design by translating cache concepts and jargon into practical methodologies and real-life examples. It also provides adequate detail to serve as a reference book for ongoing work in cache memory design.
The Second Edition includes an updated and expanded glossary of cache memory terms and buzzwords. The book provides new real world applications of cache memory design and a new chapter on cache"tricks".

Key Features
* Illustrates detailed example designs of caches
* Provides numerous examples in the form of block diagrams, timing waveforms, state tables, and code traces
* Defines and discusses more than 240 cache specific buzzwords, comparing in detail the relative merits of different design methodologies
* Includes an extensive glossary, complete with clear definitions, synonyms, and references to the appropriate text discussions

Frequently Bought Together

Customers buy this book with Memory Systems: Cache, DRAM, Disk $89.10

Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design) + Memory Systems: Cache, DRAM, Disk
Price For Both: $170.70

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Editorial Reviews

Review

"The Cache Memory Book, written by Jim Handy, a senior analyst for semiconductor memories at Dataquest Corporation, San Jose, California, provides designers with an in-depth analysis of cache approaches and implementation discussions."
--Dave Burskey in ELECTRONIC DESIGN
"While written with the professional designer in mind, this book is easily accessible to interested laypeople. Its explanations about how caches work and the different policies that must be addressed by a cache designer are among the best Ive ever read. If you need to know how cache memory systems work, read The Cache Memory Book."
--Bob Ryan in BYTE Magazine

About the Author

Jim Handy is a Principal Analyst for memories in Dataquest's Semiconductor group. He is a frequent lecturer and writer on the subject of cache memorydesign and is a patent holder in the cache design field.


Product Details

  • Hardcover: 229 pages
  • Publisher: Morgan Kaufmann; 2 edition (January 27, 1998)
  • Language: English
  • ISBN-10: 0123229804
  • ISBN-13: 978-0123229809
  • Product Dimensions: 9.1 x 6.1 x 0.9 inches
  • Shipping Weight: 1.2 pounds (View shipping rates and policies)
  • Average Customer Review: 5.0 out of 5 stars  See all reviews (3 customer reviews)
  • Amazon Best Sellers Rank: #1,228,650 in Books (See Top 100 in Books)

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14 of 15 people found the following review helpful:
5.0 out of 5 stars In-depth coverage of CPU cache architectures, June 1, 2000
This review is from: Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design) (Hardcover)
Being a digital design engineer, I wanted a book that would provide an insight into the way caches are used to solve the classic memory bandwidth problem. This book completely matched my expectations and more! It starts with a overview chapter that already touches most aspects that are involved with cache functionality. It ends with a real-world schematic of a simple (but working!) cache implementation of a 68020 procesor. The second chapter is a killer one and focusses in-depth on the tricks that can be used for squeeze more performance out of the basic cache implementation and the issue that might pop up. The first two chapters contained the information that I was really looking for. Chapter three handles some differences between RISC and CISC processor. Only 11 pages, a bit dated. Chapter four concentrates on cache coherency in multi-processor designs and some ways to solve problems. These are topics that I didn't have to deal with in the past. Interesting stuff! Finally, a chapter is devoted to some tricks that have been used to solve very specific problems. I found the book is balanced, well written and was detailed enough to satisfy my needs.
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2 of 2 people found the following review helpful:
5.0 out of 5 stars Top to down reference for cache design, March 28, 2000
By A Customer
This review is from: Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design) (Hardcover)
The book deals with different kinds of cache design, real world cache problems and interesting cache tricks. good to have as an on shelf reference for a practicing design engineer.
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1 of 1 people found the following review helpful:
5.0 out of 5 stars What to learn deeply about PC hardware? Buy this book!, November 3, 2000
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This review is from: Cache Memory Book, The, Second Edition (The Morgan Kaufmann Series in Computer Architecture and Design) (Hardcover)
This book (hard cover) is the ultimate reference about memory cache architecture. If you want to learn deeply how this circuit works, this book is perfect. It covers also the architecture of RAM memory.
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Inside This Book (learn more)
First Sentence:
The problem is simple. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
snoop cycles, cache data memory, main memory response, read miss cycle, wrapping fetch, other cached copies, assuring coherency, multiway caches, noncacheable space, write miss cycle, invalidation cycles, line fill order, coherency domain, lower address bits, snoop hit, owning cache, main memory bus, evicted line, write allocation, snoop mechanism, upstream cache, same set address, main memory location, cache control logic, cache miss cycle
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Owned Exclusively, Exclusive Modified, Owned Non-Exclusively, Shared Dirty, Shared Unmodified, Private Read, Valid Exclusive, Public Read, Exclusive Unmodified, Shared Clean, Von Neumann, Read Hit Does, Bus Read Miss Update, Read Modified, Read Shared, Main Memory Figure, Instr Cache, University of Illinois, Write Miss Update, Address Input Data Decode Execute, Supply Dirty, Set Address Cache Tag Cache Data, Valid Word
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