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Memory Systems: Cache, DRAM, Disk [Hardcover]

Bruce Jacob (Author), Spencer Ng (Author), David Wang (Author)
4.9 out of 5 stars  See all reviews (7 customer reviews)

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Book Description

0123797519 978-0123797513 September 10, 2007 1
Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem.

The book tells you everything you need to know about the logical design and operation, physical design and operation, performance characteristics and resulting design trade-offs, and the energy consumption of modern memory hierarchies. You learn how to to tackle the challenging optimization problems that result from the side-effects that can appear at any point in the entire hierarchy.

As a result you will be able to design and emulate the entire memory hierarchy.

. Understand all levels of the system hierarchy -Xcache, DRAM, and disk.
. Evaluate the system-level effects of all design choices.
. Model performance and energy consumption for each component in the memory hierarchy.

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Customers buy this book with The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It (Synthesis Lecutres on Computer Architecture) $23.86

Memory Systems: Cache, DRAM, Disk + The Memory System: You Can't Avoid It, You Can't Ignore It, You Can't Fake It (Synthesis Lecutres on Computer Architecture)


Editorial Reviews

About the Author

Bruce Jacob is an Associate Professor of Electrical and Computer Engineering at the University of Maryland, College Park. He received his Ars Baccalaureate, cum laude, in Mathematics from Harvard University in 1988, and his M.S. and Ph.D. in Computer Science and Engineering from the University of Michigan in 1995 and 1997, respectively. In addition to his academic credentials, he has extensive experience in industry: he designed real-time embedded applications and real-time embedded architectures in the area of telecommunications for two successful Boston-area startup companies, Boston Technology (now part of Comverse Technology) and Priority Call Management (now part of uReach Technologies). At Priority Call Management he was employee number 2, the system architect, and the chief engineer; he built the first working prototype of the company's product, and he built and installed the first actual product as well.

Spencer Ng is a senior technical staff member with Hitachi Global Storage Technologies. Prior to that, he was a research staff member with IBM Almaden Research Center. Before joining IBM, he was a member of technical staff with Bell Labs in Naperville, Illinois. He has been a researcher in the field of storage for over twenty years, and is the holder of about twenty issued U.S. patents. For the past fifteen years, he is heavily involved in studying and developing various techniques for improving disk drive performance.

David Wang received his PhD from the University of Maryland in 2005. David's primary research interest is into power efficient, high performance memory systems that use commodity DRAM devices. As part of his research, David has collaborated with memory system architects and design engineers, and presented his work to JEDEC in support of proposals for future generation DRAM device specifications. David is presently working as an architect for MetaRAM, a memory systems startup in the Silicon Valley.


Product Details

  • Hardcover: 900 pages
  • Publisher: Morgan Kaufmann; 1 edition (September 10, 2007)
  • Language: English
  • ISBN-10: 0123797519
  • ISBN-13: 978-0123797513
  • Product Dimensions: 9.4 x 7.3 x 1.7 inches
  • Shipping Weight: 4 pounds (View shipping rates and policies)
  • Average Customer Review: 4.9 out of 5 stars  See all reviews (7 customer reviews)
  • Amazon Best Sellers Rank: #111,144 in Books (See Top 100 in Books)

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10 of 12 people found the following review helpful:
5.0 out of 5 stars Take with a grain of salt - I'm one of the authors, September 19, 2007
This review is from: Memory Systems: Cache, DRAM, Disk (Hardcover)
Anyone who has built a computer or measured its performance recently knows that all but the slowest CPUs spend roughly 90% of their time twiddling their thumbs, checking their wristwatches, waiting on the memory system. The memory system today defines computer-system performance, yet very little is written about it (how does it work? what are the parameters? how to optimize it? etc.). So we wrote this book to address that -- it covers all facets of memory-systems design. Paraphrasing Richard Sites, one of the lead architects of the DEC Alpha processor over a decade ago, memory systems design is the only thing worth focusing on right now ... all else is a waste of time. Hopefully this will help you to build something that rocks; that was our goal.

Minor correction: the book is hardcover, not paperback.
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6 of 7 people found the following review helpful:
5.0 out of 5 stars Overall Memory Coverage, December 30, 2007
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This review is from: Memory Systems: Cache, DRAM, Disk (Hardcover)
This book is an excellent source that covers system, component and architectures of memory systems and how the total computer memory system is put together into a working system. The coverage of the material is up to date and addresses the critical issues that are facing the present and next generation memory systems being implemented and designed today. The book was well written and is a great source for engineering students and even to a degree non-engineering people. For me, a seasoned engineer, that is relatively new to memory systems, is has been a great source in helping me understand the overall system and how it all works. It also addresses some of the major engineering issues facing todays design that I am presently working on and covers the details of the components to give a good overall understanding of how it all fits together. An excellent overall source to have on hand for any engineer working on memory systems


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1 of 1 people found the following review helpful:
5.0 out of 5 stars Amazing, April 12, 2011
This review is from: Memory Systems: Cache, DRAM, Disk (Hardcover)
This is amazing book with everything you need to know about memory systems. It is written in a very clear and organized way. This book is destined to become a classic.
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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
effective address, virtual page number, memory access latency, trace caches, double data rate, loop filter, dirty flag, column access commands, row cycle time, row activation command, minimum scheduling distance, maximum sustainable bandwidth, memory system bandwidth, host side controller, chop mechanism, lookahead prefetch, cylinder switch time, row buffer hits, multiple column accesses, user page table, command busses, bitline structure, larger allocation unit size, prefetch length, spare decoder
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Memory Systems, Rambus Corp, Fully Buffered, Intel Corp, Page Offset, Michael Xu of Hitachi, Wang Rank Hop, Analog Devices, Fibre Channel, Compaq's Advanced, Moore's Law, Avg Latency, Dual Data Rate, North Link, Fast Page Mode, Row Access Strobe, Disk Disk, Fiber Channel, Write To Read, Segment Offset, Case Studies, Reduced Latency, Fast Cycle, Dynamic Cache Block, Page Frame Number Tag
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