Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL [Paperback]

Michael D. Ciletti (Author)

Book Description

ISBN-10: 0139773983 | ISBN-13: 978-0139773983 | Publication Date: March 18, 1999 | Edition: 1

Verilog aims to introduce new users to the language of Verilog with instruction on how to write hardware descriptions in Verilog in a style that can be synthesized by readily available synthesis tools. Offers clear exposition of the Verilog hardware description language. This book is written in a style that allows the user who has no previous background with hardware description languages (HDLs) to become skillful with the language. Features treatment of synthesis-friendly descriptive styles. An excellent book for self-study, reference, seminars, and workshops on the subject.

Editorial Reviews

From the Back Cover

Designed for advanced undergraduate and graduate computer science, computer engineering and electrical engineering courses in digital design and hardware description languages, this textbook presents an integrated treatment of the Verilog hardware description language (HDL) and its use in VLSI, circuit modeling/design, synthesis, and rapid prototyping.

This product is a selection from the Xilinx Design Series.

Back Cover

Designers facing the challenge of the next millennium must have the tools to exploit the rapidly advancing technology of cell-based and other ASIC device technologies, such as Field-Programmable Gate Arrays (FPGAs). It is clear that the leverage offered to designers by hardware description languages will continue to shape design methodologies at all levels of integration, from Programmable Logic Devices (PLDs) to Application-Specific Integrated Circuits (ASICs) and full-custom parts. This impact will continue to develop as more designers embrace HDL-based tools. Many of today's design flows for ASICs and FPGAs typically rely on synthesis tools that optimize and map Verilog HDL descriptions into physical netlists, thereby reducing the design cycle while increasing the opportunity for design exploration. The growing acceptance of this design paradigm suggests that an increasing number of designers will need to know how to be productive users of Verilog in the future. This book presents an integrated treatment of the Verilog hardware description language (HDL) and its use in Very Large Scale Integrated (VLSI) circuit modeling/design, synthesis, and rapid prototyping.

Included with the text are the SILOS® III Verilog development and simulation environment of Simucad, Inc., and the Xilinx® Foundation Express Student Edition, Version 2.1, software tools. This suite of PC-based software tools combined with the text makes an invaluable learning environment for digital designers.

Product Details

• Paperback: 724 pages
• Publisher: Prentice Hall; 1 edition (March 18, 1999)
• Language: English
• ISBN-10: 0139773983
• ISBN-13: 978-0139773983
• Product Dimensions: 9.6 x 7.3 x 1.4 inches
• Shipping Weight: 2.9 pounds (View shipping rates and policies)
• Average Customer Review: 3.0 out of 5 stars  See all reviews (11 customer reviews)
• Amazon Best Sellers Rank: #3,403 in Books (See Top 100 in Books)
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Most Helpful Customer Reviews

6 of 7 people found the following review helpful:

4.0 out of 5 stars For serious programmers!, February 1, 2000

By 

Amit M. (Dekalb, Illinois) - See all my reviews

This review is from: Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL (Paperback)

This is a great book but beginners will find it a little advanced though the author says that it is also meant for beginners. But if u cast that aside, u have winner in your hands. Every topic in this book is discussed in detail and in a thorough manner. It is a good reference to have and will add weight to your verilog collection. The only reason for its low popularity might be its price, but i think its worth it.

14 of 19 people found the following review helpful:

1.0 out of 5 stars Save your money, September 21, 1999

By A Customer

This review is from: Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL (Paperback)

Don't buy this book if you want to do any self-study. I ordered the book through the mail, so I could get the full affect of feeling like a total idiot. Based on the book's content, I would guess that the author has never worked in Industry and that the book's main purpose is to support academia. There are no answers in the book, nor is there a Student Manual available. The title is very misleading, I assumed the book would be a compilation of some real-life examples, concluding with the synthesis of each example. Instead, the book contains the following: (Chapters 1-10) an introduction to the Verilog language, with a few synthesis notes sprinkled throughout; Chapter 11 discusses signal strengths and the bowels of devices (MOS transistor level); Chapter 12 contains the closest real-world examples, but uses the tired AMD 2901 that has been floating around for 10 years; Chapter 13 discusses the old XILINX 3000 series architecture using an ancient example of a roulette wheel application for an outdated XILINX evaluation board. Save your $100, buy the Verilog HDL design guide written by Samir Palnitkar (Prentice Hall) and download XILINX's free 314-page design and sythesis guide.

1 of 1 people found the following review helpful:

4.0 out of 5 stars Recommended., November 29, 2003

By 

Stephen Henry (Scotland, UK) - See all my reviews

This review is from: Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL (Paperback)

I am using this book for an introductory Verilog class at my University and I must say I am truely confused by some of the reviews here. Although this book takes the reader through the most basic elements of the Verilog language, to its more complex and esoteric uses, most people here complain that the it fails to provide the advanced, cutting-edge examples they feel it should have. What? Do you really expect to learn how to build a Pentium IV from a book teaching the basics of Verilog? Get real!

This book teaches the basics, it teaches you how to use the Verilog language by providing examples that, although dated, illustrate timeless approaches that are used in every Verilog design large or small. If you can't find how to complement a variable, then its your fault, not the book; I can assure you its there. Furthermore, if you think that pointing out a few mistakes in the book, (and have obviously learnt the correct way of doing it from it), makes it rubbish, then I'm afraid there won't be any books that will fully satisfy your needs.

This is one of the best books I've encountered on the Verilog langauge. Although I wouldn't say it's as good as, say, Ashendens VHDL, it is _not_ as bad as some of the reviews here make out. Recommended!