Customer Reviews

Modeling, Synthesis, and Rapid Prototyping with the VERILOG (TM) HDL

5 star:		(1)
4 star:		(5)
3 star:		(1)
2 star:		(1)
1 star:		(3)

 

 

This is a great book but beginners will find it a little advanced though the author says that it is also meant for beginners. But if u cast that aside, u have winner in your hands. Every topic in this book is discussed in detail and in a thorough manner. It is a good reference to have and will add weight to your verilog collection. The only reason for its low popularity might be its price, but i think its worth it.

Don't buy this book if you want to do any self-study. I ordered the book through the mail, so I could get the full affect of feeling like a total idiot. Based on the book's content, I would guess that the author has never worked in Industry and that the book's main purpose is to support academia. There are no answers in the book, nor is there a Student Manual available. The title is very misleading, I assumed the book would be a compilation of some real-life examples, concluding with the synthesis of each example. Instead, the book contains the following: (Chapters 1-10) an introduction to the Verilog language, with a few synthesis notes sprinkled throughout; Chapter 11 discusses signal strengths and the bowels of devices (MOS transistor level); Chapter 12 contains the closest real-world examples, but uses the tired AMD 2901 that has been floating around for 10 years; Chapter 13 discusses the old XILINX 3000 series architecture using an ancient example of a roulette wheel application for an outdated XILINX evaluation board. Save your $100, buy the Verilog HDL design guide written by Samir Palnitkar (Prentice Hall) and download XILINX's free 314-page design and sythesis guide.

I am using this book for an introductory Verilog class at my University and I must say I am truely confused by some of the reviews here. Although this book takes the reader through the most basic elements of the Verilog language, to its more complex and esoteric uses, most people here complain that the it fails to provide the advanced, cutting-edge examples they feel it should have. What? Do you really expect to learn how to build a Pentium IV from a book teaching the basics of Verilog? Get real!

This book teaches the basics, it teaches you how to use the Verilog language by providing examples that, although dated, illustrate timeless approaches that are used in every Verilog design large or small. If you can't find how to complement a variable, then its your fault, not the book; I can assure you its there. Furthermore, if you think that pointing out a few mistakes in the book, (and have obviously learnt the correct way of doing it from it), makes it rubbish, then I'm afraid there won't be any books that will fully satisfy your needs.

This is one of the best books I've encountered on the Verilog langauge. Although I wouldn't say it's as good as, say, Ashendens VHDL, it is _not_ as bad as some of the reviews here make out. Recommended!

I have read many programming books but this is by far the worst ever. The index is not useful at all, I found myself trying to sift through miles of code just trying to find out how to perform a compliment operation. Do not buy this book if you are a beginner and if your not a beginner then you don't need it.

Do not buy this book.

Of course, it is out of date. That is not the author's fault, as it was published before Verilog 2001. Everything else *is* his fault, however.

This book does not present material in an order that is useful for learning the language. It is not skimmable. It is not easy to just "look something up." Useful information, if there is any, is buried deeply in meaningless exposition. The emphasis placed on the material does not correspond with any design methodology I am familiar with.

This book says a log about nothing. Read Sections 8.1 - 8.5, for instance, including such material as "Benefits of Synthesis". Design is about synthesis. Synthesis is the whole *point*.

This book uses blocking assignments in sequential logic. It uses nonblocking assignments in combinational logic. This is not just bad style. It is dangerous advice (especially in the former case)

Examples in this book are so simple as to be trivial. Examples should be edifying, not obvious.

Having been through this book far too many times, now, I am *still* left with no clear idea who it was written for. It is clearly not a practical book for someone looking to pick up Verilog quickly. It certainly has *nothing* to do with rapid prototyping, despite the title. It does not clarify anything that couldn't be more easily gleaned from the Verilog Standard itself.

In short, I'm sorry I ever bought this book. It has wasted more of my time than it has ever saved. Instructors: AVOID using this book in your courses, please. Designers, pick somthing else.

This book is not the a quick start verilog book. It is a comprehensive verilog bible kind of a book and hence a good reference. There are explanations for everything from syntax, usage, to pitfalls and subtleties. If you are going to buy only one book and intend to learn verilog seriously I would recommend this book. If you are just tinkering with verilog however and want to experiment only for a while, you should consider one of the "learn verilog in 24 hours" or quick start verilog books.

This book is one best to learn Verilog with. Each chapter starts with an statement of the chapters objectives, then covers the topic with many examples and finally summarizes the chapter at the end. There are an series of questions at the end of each chapter that help to solidify the concepts within each chapter. (but no answers in the book). All in all I think that this is the best overall presentation of Verilog that I have read yet. Samir Palnitar's Verilog HDL is slower paced and thus better for the novice (I read this one first). This book is slightly more advanced and seems to take you further.

The reader from Ann Arbor was unduly harsh in his review of the text. I have read the book cover-to-cover, and found it to be very instructive and helpful. Yes, the author used some devices that are antiquated in a few examples. So what!! The purpose of the text is to instruct how to write good code--and the book does exactly that. In fact, this book even helped me write good VHDL code. Give your career a boost--buy the book.

Hiding behind the cloak of anonymity, the reviewer from Ann Arbor appears to have an axe to grind, and misrepresents the content of the book, which is loaded with fully-developed, practical, industry-tested examples and tips on modeling style and synthesis. Contrary to his/her misrepresentation, five chapters are devoted to synthesis. In addition to the Xilinx 3000 devices, which are given minor treatment, the book discusses the state-of-the-art the Xilinx 4000 series architecture in depth. Nearly half of the book addresses topics in synthesis. Solutions to the end-of-chapter problems can be verified with the Simucad Silos III simulator and Xilinx Foundation Express tools that are bundled with the book. A web site supporting the book is under development. I'm obviously biased too, so see www.sutherland.com for an objective, unbiased review by an internationally recognized industry expert.

First printing has some different problem numbers from other printings. Check the printing number against class requirements.