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Optimized ASIP Synthesis from Architecture Description Language Models [Hardcover]

Oliver Schliebusch (Author), Heinrich Meyr (Author), Rainer Leupers (Author)

Price: $135.00 & this item ships for FREE with Super Saver Shipping. Details
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Book Description

February 5, 2007 1402056850 978-1402056857 1
New software tools and a sophisticated methodology above RTL are required to answer the challenges of designing an optimized application specific processor (ASIP). This book offers an automated and fully integrated implementation flow and compares it to common implementation practice. It provides case-studies that emphasize that neither the architectural advantages nor the design space of ASIPs are sacrificed for an automated implementation.

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About the Author

Prof. Heinrich Meyr and Prof. Rainer Leupers have co-authored several books for Springer/Kluwer

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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
debug state machine, debug mechanism, instruction bit width, condition check implementation, exclusiveness information, epilogue handling, hardware model generation, resource sharing optimizations, high design efficiency, decision minimization, coding coverage, architectural efficiency, timing approximation, interpretive simulation, program breakpoints, computational building blocks, data breakpoints, compiled simulation, turbo decoding algorithm, coding graph, debug interface, exclusive execution, graph creation, conflict graphs, processor features
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Design Compiler, Unified Description Layer, Exclusive Operators
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