Aims to help programmers optimize PowerPC code at the assembly-language level. The text covers key concepts to RISC programming, such as pipelining, and expands on and corrects limited Motorola documentation for the PowerPC chip.
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4.0 out of 5 stars
Good but outdated,
By A Customer
This review is from: Optimizing Powerpc Code: Programming the Powerpc Chip in Assembly Language (Paperback)
This was an excellent book when it came out; however, recent changes in the PowerPC archetecture have made it significantly less useful. Specifically, this book covers the (no longer current) PowerPC 601 and 603 chips, the (obsolete) POWER architecture, and a draft spec of PowerPC 32- and 64-bit implementations. No sign of the 604, let alone the G3 processors (740, 750, etc.) I really wish that he'd do an updated version... if it covered those two processor types, and maybe some of the embedded versions of the PowerPC processor, this book would be a 10!
5.0 out of 5 stars
Good book with clear explanations of pipeline timing, etc.,
By A Customer
This review is from: Optimizing Powerpc Code: Programming the Powerpc Chip in Assembly Language (Paperback)
This book is a great reference for the PowerPC instruction set and architecture. The discussion of timing and pipelining issues, with charts of cycles spent in each subunit, is useful. Even for high-level programmers, knowing how the processor works can greatly improve your code. (From the most basic stuff like using FPRs for copying large chunks of data, to knowing how many local variables can fit in registers, etc. up to instruction scheduling, pipelining, etc. -- even though the compiler usually takes care of that for you). This book has detailed information on each instruction and all the mnemonics and how they work. If you already know assembly, it's a wonderful reference. If you don't know assembly, you'll be pretty lost with this book. (You don't have to know hardware architectures -- the book does a nice job of explaining this). Personally, I use it mostly when I'm reading disassembled code in MacsBug, but use it for writing code when I need to go down to that level. Oh, also it explains that whole business about the TOC and also stack frames on the PPC which had always confused me a bit before for some reason.
5.0 out of 5 stars
Good book with clear explanations of pipeline timing, etc.,
By A Customer
This review is from: Optimizing Powerpc Code: Programming the Powerpc Chip in Assembly Language (Paperback)
This book is a great reference for the PowerPC instruction set and architecture. The discussion of timing and pipelining issues, with charts of cycles spent in each subunit, is useful. Even for high-level programmers, knowing how the processor works can greatly improve your code. (From the most basic stuff like using FPRs for copying large chunks of data, to knowing how many local variables can fit in registers, etc. up to instruction scheduling, pipelining, etc. -- even though the compiler usually takes care of that for you). This book has detailed information on each instruction and all the mnemonics and how they work. If you already know assembly, it's a wonderful reference. If you don't know assembly, you'll be pretty lost with this book. (You don't have to know hardware architectures -- the book does a nice job of explaining this). Personally, I use it mostly when I'm reading disassembled code in MacsBug, but use it for writing code when I need to go down to that level. Oh, also it explains that whole business about the TOC and also stack frames on the PPC which had always confused me a bit before for some reason.
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