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Phase-Locked Loops Engineering Handbook for Integrated Circuits
 
 
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Phase-Locked Loops Engineering Handbook for Integrated Circuits [Hardcover]

Stanley Goldman (Author)
5.0 out of 5 stars  See all reviews (6 customer reviews)

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Book Description

February 28, 2007 159693154X 978-1596931541
Phased-locked loops (PLLs) are control systems that have become indispensable in today's electronic circuitry. This highly accessible handbook is a practical resource that electronics engineers and circuit designers will find invaluable when developing these systems. PLLs are highly complex to design and are just as difficult to test. To speed development and ensure effective testing, engineers can turn to this collection of practical solutions, SPICE listings, simulation techniques, and testing set-ups. The book offers in-depth coverage of monolithic phase-locked loops and the latest generation of PLLs, showing how to meet the demand for high-powered, low-cost electronics. Moreover, this cutting-edge volume examines the complexities and new technologies for integrating monolithic PLLs on a single chip.

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Editorial Reviews

About the Author

Stanley Goldman is a distinguished member of the technical staff at Texas Instruments, working in the Wireless Mixed Signals Product Group. A widely known author and presenter, holder of several patents, and a senior member of the IEEE, he holds a B.S. in electrical engineering from Carnegie-Mellon University.

Product Details

  • Hardcover: 586 pages
  • Publisher: Artech House Publishers (February 28, 2007)
  • Language: English
  • ISBN-10: 159693154X
  • ISBN-13: 978-1596931541
  • Product Dimensions: 10.2 x 7.3 x 1.4 inches
  • Shipping Weight: 2.6 pounds (View shipping rates and policies)
  • Average Customer Review: 5.0 out of 5 stars  See all reviews (6 customer reviews)
  • Amazon Best Sellers Rank: #397,443 in Books (See Top 100 in Books)

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2 of 2 people found the following review helpful:
5.0 out of 5 stars Best PLL Book for Integrated Circuit Designers, June 17, 2007
This review is from: Phase-Locked Loops Engineering Handbook for Integrated Circuits (Hardcover)
This is the best book for integrated circuit designers who have to design high performance PLLs in their jobs. Not only does it review the fundamental theories of different PLL architectures but also discusses the subtleties of each design. This is by far the best book for real world PLL designs. It should be in every integrated circuit designer's library. I am amazed how many inside tricks and subtleties this book explains. You get up to date on important circuits for high perfomance PLL design that yield in the real world.
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1 of 1 people found the following review helpful:
5.0 out of 5 stars Excellent book for IC designers, September 23, 2008
By 
Nancy Huang (Dallas, TX, USA) - See all my reviews
This review is from: Phase-Locked Loops Engineering Handbook for Integrated Circuits (Hardcover)
This is one of the best books for high performance PLLs IC designers. The book guides us through design, simulation, and troubleshooting, turn to this collection of practical solutions, SPICE listings, simulation techniques, and testing set-ups. It contains an amazing amount of information on PLLs of various kinds and on their applications in systems. The challenges to integrate more and more functions onto a single chip are well explained by the author with apparent ease and rigor. This is an excellent book for an IC designer who wants to be excellent.
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1 of 1 people found the following review helpful:
5.0 out of 5 stars Essential for students and practising engineers, March 17, 2008
This review is from: Phase-Locked Loops Engineering Handbook for Integrated Circuits (Hardcover)
This book fills a much needed gap in the texts on the market on PLL design. As a student and then a practising engineer who has designed several PLLs for commercially successful ICs, I find that this book serves as a good college text as well as a handy reference to industrial designers who have to make critical design trade-offs.

If someone were to ask the question - "why should I buy this book versus the rest?" here is what sets this book a class apart.

1. It deals with theory, circuit simulation and testing of PLLs.
2. For those who like math - it has rigorous equations to go with the intuitive analysis. The math is reinforced with examples and SPICE simulations and waveforms. For example section 3.2 - phase noise, 3.5 - acquisition of lock are difficult topics that are presented in a clear manner.
3. For students the extensive references at the back of each chapter will prove very handy. The subjective questions and numerical problems will serve to reinforce understanding of the material. Although the solutions/answers are not shown in the text, this should not discourage anyone from trying the problems out.
4. One of my favorite sections is the chapter 7 on test and measurements.
PLL measurements are to be done with care and the author covers all critical measurements such as jitter and even provides suggestions for instruments to be used and how to set them up. For a test engineer, this is quite obviously a superior method as opposed to learning by trial and error. Sections 7.6 and 7.9 are especially worth reading.
5. My other favorite chapter 8 is on simulation. I have not seen a more concise yet wide coverage of simulation methodology for PLLs in a text yet. The author shows options for transistor level and behavioral modelling, uses simulators such as SPICE and POWERMILL to highlight how different parameters can be tested effectively and indicates how one can visualize non-ideal behaviors.
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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
output force, phas nois, phas margin, ind ctor, switching tim, voltag gain, voltag sourc, imp danc, figur shows, freq ency, reference sideband level, ind ctance, compon nts, sch matic, comp nsation, rmodulation products, example procedure shows, flicker corner frequency, ctor output, output voltag, req irements, rve shows, optimum loop bandwidth, archit ctur, duty cycl
Key Phrases - Capitalized Phrases (CAPs): (learn more)
New York, Time Figur, Wiley Interscience, Frequency Figur, Nois Basics, Exampl Valu, Radar Syst, Journal of Solid Stat Circuits, Analog Int, Acquisition of Lock, Monolithic Phas, The Bode, Circuits Figur, Willy Sans, Standard Jitt, Frequency of Modulation, Mark Freq, Communication Syst, Ilon Univ, Exampl Applications, Integrated Circ, Tun Lin, Offset Frequency
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