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5.0 out of 5 stars
Required reading for anyone involved in verification!, November 12, 2006
This review is from: A Practical Introduction to PSL (Integrated Circuits and Systems) (Hardcover)
For all design or verification engineers interested in the emerging field of assertion-based verification (ABV), you will want to own Cindy Eisner and Dana Fisman's excellent book: A Practical Introduction to PSL. For those who are new to PSL, you will find that this book incrementally introduces the language in an easy-to-understand fashion. Each chapter is chock-full of practical examples, complete with waveforms to visually aid an understanding of the properties. For the expert, you will find that this book is an excellent reference. For readers from beginner to expert, the chapter on Common Errors clarifies often misunderstood concepts, and it will set you in the right direction for successfully applying PSL.
This book should be part of any serious engineer's personal library.
Harry Foster
Co-author--Assertion-Based Design, Applied Formal Verification, Principles of Verifiable RTL Design
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5.0 out of 5 stars
More than a language guide, August 9, 2011
This review is from: A Practical Introduction to PSL (Integrated Circuits and Systems) (Hardcover)
I found A Practical Introduction to be a valuable guide to the visible parts of PSL and an even better guide to its frightening depths. It equips you to work in temporal language - a field that manages to be maddeningly subtle, strewn with unmarked hazards, and of immense practical value.
Verification engineers are always thinking about events in time, so a language of them does not seem formidable. And PSL - originally named Sugar, as in syntactic - was bred to be pretty. A trip through Google can leave you imagining you're ready to write.
But as many already know, temporal language is as hazardous as it is graceful.
That's a beautiful thing. The language makes precise areas where people think fuzzily, and as a verification engineer, that's just where you want to be. But it means that to learn PSL - to learn temporal expression generally - you'll need guts and a Sherpa.
Eisner and Fisman helped develop the language and its formal semantics. They ushered the language through standardization. They have trained verification engineers in it. So they understand the language's subtleties and misuse.
Reflecting this, the book gives examples, always with waveforms, for the language's features and flavors. It clarifies subtleties. It is wide-ranging, with chapters on, for example, multiply clocked designs. It is, as you would hope, definitive.
Into this is mixed a more-than-I-bargained-for chapter, Common Errors. So you thought, after reading carefully, that you had the subtleties down? Probably you're doing something in this chapter. And I reread, with deeper understanding, the chapters that came before.
Another striking chapter was High- Versus Low-Level Assertions, showing that although we'd been talking about bits, the language can express high-level state with amazing compactness. I wish this chapter had been longer.
I finished the book feeling I had not only grasped PSL, but, through it, the thinking essential to using temporal language effectively.
Disclaimer: The authors work for IBM and so do I. I do not know them, I have not worked with them, and I purchased the book on my own.
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