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A Practitioner's Guide to RISC Microprocessor Architecture
 
 
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A Practitioner's Guide to RISC Microprocessor Architecture [Hardcover]

Patrick H. Stakem (Author)


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Book Description

0471130184 978-0471130185 April 25, 1996 1
Here is an up-to-date, single-source book that offers a complete overview of RISC technology—as design philosophy, market force, and technology driver. Through its comprehensive coverage, information technology professionals and advanced students learn the fundamentals of RISC design, as well as the trade-offs, limitations, speed, cost, complexity, and implementations of the various architectures. Built on an overall structure that carefully balances theory and practice, this unique book reviews the basics and background of the technology, and then continues with specific case study examples that compare and contrast different implementations.

Approaches RISC as a design philosophy and discusses such architectural topics as superscalar, superpipelining, and very-long-instruction-word (VLIW) techniques

  • Examines all the major chip architectures for current and emerging chip systems—more than 25 different chip families are explored, compared, and contrasted—without vendor hype
  • Discusses such timely and important application areas as high-performance workstations, embedded systems, personal digital assistants, and multimedia set-top boxes
  • Reviews the history and trends of RISC technology to give the reader a broad per-spective on this rapidly developing field
  • Provides invaluable supplementary materials, including an extensive list of chip manufacturer contacts, a full glossary of technical terms, an up-to-date taxonomy of chip products, over 600 bibliographic citations, and more

For hardware and software engineers, system architects and designers, information technology professionals, managers, and advanced students, A Practitioner's Guide to RISC Microprocessor Architecture offers an indispensable resource for working with this dynamic technology.


Editorial Reviews

From the Publisher

An introduction to Reduced Instruction Set Microprocessors which is a subfield of RISC. Describes the fundamentals of RISC microprocessor design, enabling readers to understand the trade-offs, limitations, speed, cost, complexity, and diverse architectures. Examines the software tools to develop, debug, and maintain RISC systems. Includes specific design examples, drawn from industry, and a list of contact information for key manufacturers and RISC organizations.

From the Back Cover

Here is an up-to-date, single-source book that offers a complete overview of RISC technology—as design philosophy, market force, and technology driver. Through its comprehensive coverage, information technology professionals and advanced students learn the fundamentals of RISC design, as well as the trade-offs, limitations, speed, cost, complexity, and implementations of the various architectures. Built on an overall structure that carefully balances theory and practice, this unique book reviews the basics and background of the technology, and then continues with specific case study examples that compare and contrast different implementations.

Approaches RISC as a design philosophy and discusses such architectural topics as superscalar, superpipelining, and very-long-instruction-word (VLIW) techniques

  • Examines all the major chip architectures for current and emerging chip systems—more than 25 different chip families are explored, compared, and contrasted—without vendor hype
  • Discusses such timely and important application areas as high-performance workstations, embedded systems, personal digital assistants, and multimedia set-top boxes
  • Reviews the history and trends of RISC technology to give the reader a broad per-spective on this rapidly developing field
  • Provides invaluable supplementary materials, including an extensive list of chip manufacturer contacts, a full glossary of technical terms, an up-to-date taxonomy of chip products, over 600 bibliographic citations, and more

For hardware and software engineers, system architects and designers, information technology professionals, managers, and advanced students, A Practitioner's Guide to RISC Microprocessor Architecture offers an indispensable resource for working with this dynamic technology.


Product Details

  • Hardcover: 400 pages
  • Publisher: Wiley-Interscience; 1 edition (April 25, 1996)
  • Language: English
  • ISBN-10: 0471130184
  • ISBN-13: 978-0471130185
  • Product Dimensions: 9.6 x 6.4 x 1 inches
  • Shipping Weight: 1.6 pounds
  • Amazon Best Sellers Rank: #3,096,560 in Books (See Top 100 in Books)

More About the Author

Pat is a member of the National Railway Historical Society, Western Maryland Chapter, in Cumberland, Maryland. He also belongs to the Chesapeake & Ohio Canal Historical Society, and the Railroad and Locomotive Historical Society.

He is co-author of the Western Maryland Diesels and the CSX books was his son, another Patrick.

He works in the Aerospace Industry, and teaches for Loyola University in Maryland and the Whiting School of Engineering, Johns Hopkins University.

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Inside This Book (learn more)
First Sentence:
The Reduced Instruction Set Computer (RISC) as a design philosophy has been around since the beginning of computers, but has only become mainstream in the last few years, as the quest for raw speed has dominated the highly competitive computer industry. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
address translation cache, stack cache, branch target cache, floating multiply, bus snooping, integer pipeline, complex addressing modes, processor status register, dynamic branch prediction, prefetch buffer, precision architecture, global register, multiple execution units, multiprocessing support, superscalar design, set associative, memory management functions, register renaming, unified cache, privilege violation, delayed branches, rounding modes, instruction queue, supported data types, virtual addressing
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Microprocessor Report, Digital Equipment Corporation, User's Manual, Pentium Pro Processor, Advanced Micro Devices, Electronic Design, Intel Corporation, New York, Englewood Cliffs, Analog Devices, Electronic Engineering Times, Features Large, Microchip Technology, Cypress Semiconductor, Dobbs Journal, Inmos Corporation, Prentice Hall, Stanford University, Courtesy of Integrated Device Technology, Hot Chips, Palo Alto, Precision Architecture, Sun Microsystems, Technical Summary, User's Guide
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This book cites 38 books:
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