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Processor Design: System-On-Chip Computing for ASICs and FPGAs
 
 
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Processor Design: System-On-Chip Computing for ASICs and FPGAs [Hardcover]

Jari Nurmi (Editor)
4.0 out of 5 stars  See all reviews (1 customer review)

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Book Description

1402055293 978-1402055294 June 28, 2007 1
Here is an extremely useful book that provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The authors cover a number of different types of processor core.

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Editorial Reviews

Review

From the reviews: “Editor Jari Nurmi’s proposal was to put together the first effective textbook aimed at the subject of processor design. The book comprises 21 chapters, written by a total of 45 contributing authors with backgrounds in both academic and industrial fields. … To summarize, this book offers a nice overview on the steps involved in designing a soft-processor, as well as a good perspective on past architectures and current trends in processor design.” (Ricardo Jasinski, The Computer Journal, Vol. 53 (1), 2010)

From the Back Cover

Processor Design addresses the design of different types of embedded, firmware-programmable computation engines. Because the design and customization of embedded processors has become a mainstream task in the development of complex SoCs (Systems-on-Chip), ASIC and SoC designers must master the integration and development of processor hardware as an integral part of their job. Even contemporary FPGA devices can now accommodate several programmable processors. There are many different kinds of embedded processor cores available, suiting different kinds of tasks and applications. Processor Design provides insight into a number of different flavors of processor architectures and their design, software tool generation, implementation, and verification. After a brief introduction to processor architectures and how processor designers have sometimes failed to deliver what was expected, the authors introduce a generic flow for embedded on-chip processor design and start to explore the vast design space of on-chip processing. The types of processor cores covered include general purpose RISC cores, traditional DSP, a VLIW approach to signal processing, processor cores that can be customized for specific applications, reconfigurable processors, protocol processors, Java engines, and stream processors. Co-processor and multi-core design approaches that deliver application-specific performance over and above that which is available from single-core designs are also described. The special design requirements for processors targeted for FPGA implementation, clock generation and distribution in microprocessor circuits, and clockless realization of processors are addressed. Tools and methodologies for application-specific embedded processor design are covered, together with processor modelling and early estimation techniques, and programming tool support for custom processors. The book concludes with a glance to the future of embedded on-chip processors.

Product Details

  • Hardcover: 548 pages
  • Publisher: Springer; 1 edition (June 28, 2007)
  • Language: English
  • ISBN-10: 1402055293
  • ISBN-13: 978-1402055294
  • Product Dimensions: 9.2 x 6.1 x 1.2 inches
  • Shipping Weight: 2.3 pounds (View shipping rates and policies)
  • Average Customer Review: 4.0 out of 5 stars  See all reviews (1 customer review)
  • Amazon Best Sellers Rank: #2,377,708 in Books (See Top 100 in Books)

 

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3 of 3 people found the following review helpful:
4.0 out of 5 stars Strong introductory survey, November 1, 2007
This review is from: Processor Design: System-On-Chip Computing for ASICs and FPGAs (Hardcover)
During the 1980s and 90s, increasing fab costs made processor design into a rarefied art, practiced largely in labs at a few companies whose names you already know. Since the late 1990s, reconfigurable logic has democratized processor design again. More people are creating or customizing processors to meet unique needs. This book addresses many of the issues that the processor designer must address. Logic design is the least of those issues, and is not addressed in this compilation.

Instead, this addresses higher-level concerns. Chapters 3 and 11 deal offer hard-won experience in the common problems that processor designers create for themselves; the latter deals specifically with the quirks of FPGA logic as it constrains what the processor designer should do. Another chapter presents the ever-present and ever-problematic clock distribution problems; yet another presents the basics of clock-free design. Several chapters examine VLIW, DSP, TTA, and customizable or configurable cores of many kinds. Moving up in conceptual level, other chapters address what needs to be customized, what measurements should be made to support the decision, and instrumentation needed for making those choices. Other chapters present issues about compilation, simulation, performance estimation, and testing.

I can't imagine the reader who will benefit from all the information here. Compiler writers trying to deal with customized instruction sets will skip over clock distribution; embedded Java developers and ARM or MIPS designers might not get much from TTA and VLIW implementations. Every leading edge developer should be at least peripherally aware of over-all isues, though. This book supports such readers by avoiding distracting levels of detail, while presenting enough real knowledge to earn the book's price. This one's getting passed around my office.

-- wiredweird
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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
processor design, system level simulations, coprocessor approach, instruction level parallelism, stream algorithms, processor frequency, storage functional components, first silicon debug, interconnection network controller, processor customization, forwarding multiplexers, processor design flow, customizable processors, scalar operand network, lode setting, bypass muxes, execution bundle, instruction set metamorphosis, using logic elements, pipeline control unit, clock grid, dst address, simulator generator, destination reg, saturation logic
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Seppo Virtanen, Jari Nurmi, Tapani Ahonen, Software-Based Self-Testing of Embedded Processors, Nektarios Kranitis, Run-Time Reconfigurable Processors, Michael Bedford Taylor, Stream Multicore Processors, Dragos Truscan, Joonas Tyystjärvi, Tero Säntti, Claudio Mucci, Its Impact, Christian Panis, Embedded Computer Architecture Fundamentals, General-Purpose Embedded Processor Cores, Accelerating Multimedia Applications, System Verilog, Stefan Rusu, Tero Nurmi, James Ball, Johan Lilius, Mnemonic Meaning Mnemonic Meaning, Texas Instruments, Gene Frantz
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Front Cover | Table of Contents | First Pages | Index | Surprise Me!
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