Customer Reviews

Real World FPGA Design with Verilog

5 star:		(2)
4 star:		(5)
3 star:		(1)
2 star:		(0)
1 star:		(4)

 

 

When I started reading this book, I was excited about its potential. Written by an engineer, it did not focus on the language, but on real world engineering issues (how about an HDL design book that talks about robustness, metastability, etc. on its first pages?).

The book does address many engineering issues, as well as real FPGA features and constraints that for many engineers take years to learn. Many of this information is there.

But, and it's a big but, the information is not presented clearly. There are too many bugs for a teaching book. And the organization of the text is not good.

Anyway, I would recommend this book to any design engineer interested in learning Verilog (but not as a first book, maybe as a second)

Be sure to pay a visit to this site:

http://www.bytechservices.com/verilog.htm#errata

where there are corrections to the bugs on the book.

About the companion CD: It's a fine piece of CD, with many utilities, of which the Silos Verilog simulator alone almost justifies buying the book itself (btw, you can also download Silos from the Internet)

About myself: I'm a hardware design engineer, with about 10 years experience on the field and the last four years, at HDL design.

This book addresses how to use Verilog to create working FPGA designs. It touches on topics such as clocking, implementation of specific types of logic blocks, and design flow. The examples are written using Verilog.

The writing is sloppy, the organization is incoherent, and the explanations are incomplete. A reader may find the book worthwhile if: he or she already knows most of the material presented, has a few problems that are addressed by the book, can find the discussion of that problem in the book, and the discussion is one of those that is complete and accurate. Otherwise, the book is a waste of time and money.

The author assumes that the reader is familiar with digital logic design, the basics of Verilog, and the basics of FPGA and ASIC design. The book discusses strategies for dealing with practical problems. Unfortunately, the strategies are presented in a disorganized manner, with explanations that are poorly thought out and too incomplete to use.

The first chapter introduces Verilog design for FPGA synthesis. The contents of the chapter are a mish-mash. It is hard to tell what you are supposed to know after reading the chapter that you didn't have to know before reading it. The chapter isn't a quick description of Verilog, because it leaves out most Verilog syntax that you have to know (for example, vectors). The chapter isn't limited to describing what subset of Verilog is synthesizable, because it has detailed but incomplete descriptions of random Verilog topics such as number formats (eg. 1'b0). There are even pages of tables showing boolean logic truth tables for basic logic primitives such as and, or, and xor.

The second chapter is a discussion of how FPGAs are implemented, and the effect that this has on synthesis. For example, clocking strategies are discussed, with some references to differences between FPGAs and ASICs. There is also a discussion of how a logic synthesizer might operate. A few other topics are thrown in, such as a discussion of DeMorgan's theorems. The chapter is too incomplete and poorly-written to be of much practical use. For example, although there is a description of how logic elements can be built out of transistors (including simplified schematics of one possible approach), there is no serious discussion of what implications this has. The book is about FPGA design, but the section on how logic functions are implemented in most FPGAs (as lookup tables) does not describe this in any detail.

The third and fourth chapters, regarding implementing specific digital circuits in FPGAs using Verilog, are potentially the most useful. The concept of the chapters is that they show how to write Verilog for useful functions in a way that can be synthesized well into FPGAs. If the chapters had been well organized and complete, the book would have been worth buying just for them. However, the chapters are as poorly-written as the rest of the book. Large sections are taken up with a discussion of writing adders and subtractors - showing that there is little point in doing so yourself instead of letting the synthesizer do it. However, the discussion of finite state machines - an important topic - covers state machines implemented using binary or Gray codes to represent states. The discussion of 'one-hot' state machines (frequently used in practice in FPGAs) is incomplete, describing only the problems, but failing to present an example that works (or any example at all). Similarly, the discussion of FIFOs (important to synchronize portions of large designs) is limited to a few notes about problems, without a single example. This is surprising, because the book emphasizes that the designer must solve clocking and synchronization problems across large designs, yet solutions to this problem (such as FIFOs) are not described.

The second half of the book, mainly chapters 5 through 8, describe how to use specific Verilog tools. The chapters are useless reiterations of documentation for obsolete versions of specific tools.

Chapter 9, the last chapter, is about designing for ASIC conversion. This could have been a useful chapter, because it covers an important topic.

All in all, I think this is a book to avoid.

On the positive side, this book seems to have fewer obvious editing errors than most other 'instant books'. Also, the typesetting is fairly normal, with reasonable sized text and reasonable margins. The organization and contents of the section headings is hard to understand, but that is a reflection of the disorganization of the book, rather than a problem with the design. The only significant problem I had with the graphic design of the book relates to the graphics, primarily schematics with some screen captures. The scaling is not uniform, so in a single explanation, the size of a schematic symbol and associated label might vary from graphic to graphic. However, this is a minor problem.

I received this book yesterday and read it in about 5 hours - I was very disappointed. in contains a number of typos and several mistakes.

The listing 4-1 on p122 will synthesize a SYNCHRONOUS binary counter, i.e., all DFFs within count_out are clocked simultaneously with the same clk - its inside a process sensitive to clk.

A ripple counter on the other hand has one DFF fed by clk and the other counters are fed by the Q or Q-bar output of the previous FF (where each FF is configured to divide its clock input by two). Often ripple counters are built using T flip-flops. For example,

p594 "Digital Design, Principles and Practices", John Wakerly, 2nd Ed.

pp353-p356 "Fundamentals of digital logic with VHDL design", Brown and Vranesic.

In my opinion, the inclusion of illegible LeonardoSpectrum schematics is a total waste of space. The author could easily have commented on the complexity of the problem in cases where the book formatting would reproduce the schematic poorly. Alternatively, if the author needed the schematic version - redraw it!

For a title that suggests real-world design I was disappointed. The book did contain some annecdotal experience which was interesting, but in terms of how to approach a real-world design with an example of such an approach, I found it lacking.

For example, the only design of any substance in the text is an SRAM controller. However, there is no state diagram or ASM chart showing that the state machine was 'designed' or 'specified' prior to coding, and there are no timing diagrams or test bench to indicate that any simulation of the design was performed, and then there is no final analysis that shows the design met the setup/hold, etc requirements of whatever external SRAM was being used in the design. Those are the real-world issues that the author refers to in the text, but then never does himself.

Also, the HDL pretty-printing is terrible.

Two thumbs down! (I'm sending this book back)

I'm an analog design engineer with over 20 years of experience in industry. I want to add FPGA's to my bag of tricks, and I ran across Mr. Coffman's book via a search with Google. My book arrived a week ago and I am finding it to be just the kind of book I have been looking for. He has a good writing style, very easy to follow. I plan to invest many hours working through his examples with the included software. I have read other reviews of this book at this Amazon site. Some people are looking for an academic book on Verilog. Others are looking for a book that will teach them Verilog without spending the time programming and simulating (ie learning without doing homework). If you fall into either of these groups, this book is not for you. However, if you are an experienced engineer looking to learn about Verilog and VHDL through honest study and experimenting, then Mr. Coffman's book is an excellent choice to guide you through this process with a focus on the "real world". You also may find yourself chuckling at some of his commentary on the way

Anyone who understands C/pascal is going to love Ken's book. It's the perfect reference to sit next to your keyboard for a quick hands-on reference!

Ken taught me in 1 minute how to create an array of cells in an FPGA simply via the TOC! In another minute I was implementing static-keys into a ROM'd lookup table.

It could not have been easier.

*Anyone trying to implement algorithms in Verilog should by this book*

This book fit nicely in the gap I noticed between books on digital design with Verilog that were written from a structured academic standpoint and product specific user manuals and application notes. To learn effective FPGA design from books one would desire to have this book along with the other two; lacking "Real World FPGA Design" one would have to ask colleagues lots of questions and learn the rest the hard way.

I am using this book as I 'retool' as a FPGA Digital Design Engineer since full-custom design jobs here are drying up since few companies can afford the investment of time and money to bring custom devices to market. I wish there was a book like this for the classic chip design world that I could wave at the newbie system and digital designers that wanted me to add an 8 input NOR gate to the library that could drive a fanout of 50 loads 10 mm away.

Verilog is a many-faceted gem; I have been using it since the early 90's, albeit at the switch and structural level. This book is useful to me as I learn to design in Verilog at greater level of abstraction and it differs from other texts I have found in that it does not lose sight of the lower-level 'gotchas'.

The only thing that keeps me from giving this book my highest rating is that there are some errors that do need correcting; the URL listed in another review here remedies that problem.

I was told about this book from my adviser Dr Shaob A Khan. This book is not only remarkable help for the sysnthesis on FPGA, but also a smooth and desciplined guide for the beginers of Verilog. Starting from the very first example of Overheat Alarm system this book keeps the reader in an enviorment where he gradually learns for the best.

Ken's book contains many helpfull hints for the day to day FPGA design. It explains very well the pitfalls you will be trapped by and answers e.g. questions like what is actually is the difference between blocking and non-blocking assignment.

I stopped reading it about halfway through when the book started telling me how to 'point and click' my way through dialog boxes for the author's favourite verilog tools. I purchased a Verilog book to learn Verilog. If I wanted to learn how to use some software, I would have read the User's Manual for that software.
It contained enough mistakes in the examples to make some examples difficult to understand. Verilog keywords were used in some examples without explaination.

It did not cover all of the verilog language. For a newbie like myself I found this to be a big let down. I thought I was getting a book to learn verilog and how use it for real FPGAs.

There was some annecdotal experience on real world FPGA design, but very brief. He could have spent the rest of the pages covering more Verilog instead of various verilog tools.

Overall, I felt that the author put in about 25% of the effort required to write a good book on the subject. The editor used a common trick in publishing, where the font size of the text and the amount of whitespace per page is increased when an author submits much less than a book's worth of material. It fills up a book and makes the reader think that there is much more text in the book than there really is.

When I start to use FPGA, I desperately searched book list and found this book. Its name sound like it has many tech-tip and expertise in it. But unfortunately I found this book doesn't have anything useful to me. It neither can solve my coding problem for FPGA, nor it can help me to understand more about the difference in design using FPGA compared to ASIC. This book teach me that I must check the table of contents carefully not just attracted by a beautiful title before I buy a book.