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Reliable Computer Systems: Design and Evaluation, Third Edition
 
 
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Reliable Computer Systems: Design and Evaluation, Third Edition [Hardcover]

Daniel P. Siewiorek (Author), Robert S. Swarz (Author)
4.0 out of 5 stars  See all reviews (1 customer review)

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Book Description

156881092X 978-1568810928 October 1998 3
This classic reference work is a comprehensive guide to the design, evaluation, and use of reliable computer systems. It includes case studies of reliable systems from manufacturers, such as Tandem, Stratus, IBM, and Digital. It covers special systems such as the Galileo Orbiter fault protection system and AT&T telephone switching system processors.

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Product Details

  • Hardcover: 908 pages
  • Publisher: A K Peters/CRC Press; 3 edition (October 1998)
  • Language: English
  • ISBN-10: 156881092X
  • ISBN-13: 978-1568810928
  • Product Dimensions: 9.3 x 7.5 x 1.4 inches
  • Shipping Weight: 2.9 pounds (View shipping rates and policies)
  • Average Customer Review: 4.0 out of 5 stars  See all reviews (1 customer review)
  • Amazon Best Sellers Rank: #1,078,141 in Books (See Top 100 in Books)

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3 of 7 people found the following review helpful:
4.0 out of 5 stars Excellent Book on Systems Design, May 1, 2000
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This review is from: Reliable Computer Systems: Design and Evaluation, Third Edition (Hardcover)
This book is a wonderful introduction into systems design and analysis. It is fairly technical, but it has a wealth of information on failure modeling and prediction. A very good reference book, as well as a nice introduction to a soon-to-be very hot topic.
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Inside This Book (learn more)
First Sentence:
Historically, reliable computers have been limited to military, industrial, aerospace, and communications applications in which the consequence of computer failure is significant economic impact and/or loss of life. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
mission time improvement, global executive task, check moduli, interlaced parity, iterative cell switch, quadded logic, arithmetic error codes, crosslink cables, diagnostic supervisor, dispersion frame technique, incoming screening, subcritical faults, switchable entity, tth iteration cycle, interprocessor bus, inverse residue code, visibility bus, hybrid redundancy, interwoven logic, radial logic, switchable block, dynamic redundancy techniques, fault effectiveness, operand bus, standby failure rate
Key Phrases - Capitalized Phrases (CAPs): (learn more)
International Business Machines Corporation, Digital Equipment Corporation, Forced Forced, Results of Lambda, Monte Carlo, Texas Instruments, Mil Handbook, Tape Disk, Aid Aid Feature, English Programs, All Module Copies, Error-Correcting Memory Model, Instruction Instruction, Machine Check Status Register, Mission Mission, Trap Floating, Active Standby Active Standby Active Standby, Brinch Hansen, Error Status Register, Fault Status Register, Stratus Customer Assistance Center, United States
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