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Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems [Hardcover]

Jean-Pierre Deschamps (Author), Gery J.A. Bioul (Author), Gustavo D. Sutter (Author)
4.8 out of 5 stars  See all reviews (5 customer reviews)

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Book Description

March 10, 2006 0471687839 978-0471687832 1
A new approach to the study of arithmetic circuits

In Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, the authors take a novel approach of presenting methods and examples for the synthesis of arithmetic circuits that better reflects the needs of today's computer system designers and engineers. Unlike other publications that limit discussion to arithmetic units for general-purpose computers, this text features a practical focus on embedded systems.

Following an introductory chapter, the publication is divided into two parts. The first part, Mathematical Aspects and Algorithms, includes mathematical background, number representation, addition and subtraction, multiplication, division, other arithmetic operations, and operations in finite fields. The second part, Synthesis of Arithmetic Circuits, includes hardware platforms, general principles of synthesis, adders and subtractors, multipliers, dividers, and other arithmetic primitives. In addition, the publication distinguishes itself with:
* A separate treatment of algorithms and circuits-a more useful presentation for both software and hardware implementations
* Complete executable and synthesizable VHDL models available on the book's companion Web site, allowing readers to generate synthesizable descriptions
* Proposed FPGA implementation examples, namely synthesizable low-level VHDL models for the Spartan II and Virtex families
* Two chapters dedicated to finite field operations

This publication is a must-have resource for students in computer science and embedded system designers, engineers, and researchers in the field of hardware and software computer system design and development.

An Instructor Support FTP site is available from the Wiley editorial department.

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Editorial Reviews

Review

"…useful both in the academia and industry…suited for students taking specialist courses…[and] a valuable reference for practicing engineers." (IEEE Circuits & Devices Magazine, November/December 2006)

"This book is warmly recommended to anyone having to design or understand how computer arithmetic operates at almost every conceivable level of detail." (Computing Reviews.com, June 8, 2006)

From the Back Cover

A new approach to the study of arithmetic circuits

In Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems, the authors take a novel approach of presenting methods and examples for the synthesis of arithmetic circuits that better reflects the needs of today's computer system designers and engineers. Unlike other publications that limit discussion to arithmetic units for general-purpose computers, this text features a practical focus on embedded systems.

Following an introductory chapter, the publication is divided into two parts. The first part, Mathematical Aspects and Algorithms, includes mathematical background, number representation, addition and subtraction, multiplication, division, other arithmetic operations, and operations in finite fields. The second part, Synthesis of Arithmetic Circuits, includes hardware platforms, general principles of synthesis, adders and subtractors, multipliers, dividers, and other arithmetic primitives. In addition, the publication distinguishes itself with:

  • A separate treatment of algorithms and circuits—a more useful presentation for both software and hardware implementations
  • Complete executable and synthesizable VHDL models available on the book's companion Web site, allowing readers to generate synthesizable descriptions
  • Proposed FPGA implementation examples, namely synthesizable low-level VHDL models for the Spartan II and Virtex families
  • Two chapters dedicated to finite field operations

This publication is a must-have resource for students in computer science and embedded system designers, engineers, and researchers in the field of hardware and software computer system design and development.


Product Details

  • Hardcover: 576 pages
  • Publisher: Wiley-Interscience; 1 edition (March 10, 2006)
  • Language: English
  • ISBN-10: 0471687839
  • ISBN-13: 978-0471687832
  • Product Dimensions: 6.5 x 1.3 x 9.3 inches
  • Shipping Weight: 2 pounds (View shipping rates and policies)
  • Average Customer Review: 4.8 out of 5 stars  See all reviews (5 customer reviews)
  • Amazon Best Sellers Rank: #1,390,711 in Books (See Top 100 in Books)

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7 of 9 people found the following review helpful:
4.0 out of 5 stars Meets many needs, August 9, 2007
This review is from: Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems (Hardcover)
There's a lot to like here. It goes over all the low-level stuff you could hope for, including creative number system, carry-lookahead, Booth encodings, and SRT division. It addresses some of the needs of crypto people, with discussion of finite-field arithmetic. It even gives enough intro to residue number systems for the desperate developer to gain a toehold - 10,000 digit addition or subtraction can be done in a few-digit time, as long as the expense of getting into and out of RNS are amortized.

That's all good for someone who can't trust their synthesis tools for good carry chains, or for someone headed way into the weirdness. The ranges where I live get distressingly little attention. If you need a dot product of two vectors, this will do a great job on the multiply and add steps as long as you can work out all the pipelining implications for yourself, but those were never the problem - it's the parallelism (how many multiplies can you run? how deep is your adder tree? or do you have something better?). It's the memory bottleneck (what do you mean you read "a word" from memory? I want 100). It's the numbers that number-crunchers use, i.e. IEEE 754, which get a moment of mention at the beginning and at the end. Those start turning strange with NaNs, signed zeroes, and denorms, then go totally off the rails when things like Intel (not always IEEE) compliance arise from the deep.

This could be a good text for a mid-level practitioner or student, fluent with logic design but blissfully ignorant of numerical analysis. If that's your trajectory, you'll spend some amount of time where this book lives. Then you'll advance, and it will no longer serve you. That's not a criticism, since every level has its own needs, but the prospective buyer should weigh needs to be met against needs that this meets. Not all readers will find a match.

-- wiredweird
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3 of 5 people found the following review helpful:
5.0 out of 5 stars Innovative, June 6, 2006
This review is from: Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems (Hardcover)
In the part dedicated to general algorithms, very interesting new presentations or generalizations, made this work attractive at the theoretical point of view. Extensions of booth algorithms and generalizations to base B operation make the work innovative at the mathematical point of view. At the implementation level there is very good and innovative ideas towards special applications in FPGA (mainly Xilinx oriented). It would have been desirable to cope with some other technology, but the book may be considered self containing anyway.
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2 of 4 people found the following review helpful:
5.0 out of 5 stars Innovative, June 6, 2006
This review is from: Synthesis of Arithmetic Circuits: FPGA, ASIC and Embedded Systems (Hardcover)
The presentation of arithmetic theory and applications is innovative. Some of the topics are inedited; they present new approaches for both algorithmic and implementation aspects. It is a very interesting reference book for what refer to computer arithmetic in general and special purpose arithmetic circuit in particular.
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Inside This Book (learn more)
First Sentence:
The design of embedded systems, that is, circuits designed for specific applications, is based on a series of decisions as well as on the use of several types of development techniques. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
nonrestoring divider, multioperand addition, div arch, divider structure, combinational implementation, whose most significant bit, square rooter, end rtl, shifted remainder, propagate functions, architecture rtl, iterative circuit, port map, architecture circuit, finite field operations, architecture behavioral, multiplier cell, end generate, multiplier structure, end behavioral, port clk, final remainder, multiplier step, dot operation, arithmetic circuits
Key Phrases - Capitalized Phrases (CAPs): (learn more)
John Wiley, Synthesis of Arithmetic Circuits, Embedded Systems By Jean-Pierre Deschamps, Sutter Copyright, New York, Per Gelosia, Morgan Kaufmann, Von Neumann, San Francisco, Technical Report, Prentice Hall, Digital Arithmetic, Englewood Cliffs, Experimental Results, Kluwer Academic Publishers, Let Ybe, Oxford University Press, Shift-and-Add Algorithm, Complete Data Sheet, Multiplication Given, Multiplication of Polynomials
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