Fault-Tolerance and Reliability Techniques for High-Density Random-Access Memories (Prentice Hall Modern Semiconductor Design Series) (Hardcover)

by Kanad Chakraborty (Author), Pinaki Mazumder (Author)

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Product Description
Surveys the latest research and field-proven techniques for every form of memory fault tolerance, including manufacturing, online, and field-related fault tolerance. Authors focus on practical circuit and design solutions.

From the Back Cover

The state of the art in fault-tolerant RAM development and production.

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• State-of-the-art manufacturing, online, and field-related fault tolerance
• Structured custom design solutions for self-testable/self-repairable embedded RAMs
• Includes extensive illustrations and examples, plus a compendium of 500+ research papers

Next-generation electronic devices require advanced new nanofabrication CMOS technologies—and, in these environments, today's processing techniques simply will not produce adequate yields. To improve RAM reliability without compromising performance, cost, or space requirements, engineers are turning to advanced fault-tolerant techniques. In this book, Kanad Chakraborty and Pinaki Mazumder survey the latest research and field-proven techniques for every form of memory fault tolerance, including manufacturing, online, and field-related fault tolerance. Coverage includes:

• Embedded RAM for SoC design: practical circuit and layout design principles and techniques
• New research into the mechanisms underlying soft and hard failures
• Understanding the impact of scaling on reliability
• Modeling and analysis of manufacturing yield
• Manufacturing fault tolerance: built-in self-diagnosis and repair, reconfiguration, repair via EEPROM switches, flexible redundancy, and more
• Techniques for mitigating radiation-induced single-event effects
• Field fault tolerance: error correcting codes and associated circuit techniques
• Structured custom design solutions for self-testable and self-repairable embedded RAMs: circuit and physical design

Chakraborty and Mazumder focus on practical circuit and design solutions, presenting extensive illustrations and explaining device physics and circuit design theory in a reader-friendly manner. They also provide a compendium of more than 500 research papers on memory fault tolerance and reliability. Whether you're a design engineer, test engineer, manufacturer, or researcher, this is a comprehensive resource for building next-generation RAM with next-generation reliability.

Modern Semiconductor Design Series

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Product Details

• Hardcover: 448 pages
• Publisher: Prentice Hall PTR (June 10, 2002)
• Language: English
• ISBN-10: 0130084654
• ISBN-13: 978-0130084651
• Product Dimensions: 9.5 x 7.2 x 0.9 inches
• Shipping Weight: 1.8 pounds
• Average Customer Review: 5.0 out of 5 stars See all reviews (1 customer review)
• Amazon.com Sales Rank: #2,340,651 in Books (See Bestsellers in Books)

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Customer Reviews

Most Helpful Customer Reviews

5.0 out of 5 stars The Encyclopedia of Fault Tolerant RAM Design, June 19, 2002

By A Customer

Archeologists today are in possession of clay tablets that still bear on their surface the symbols that were written on them over 6000 years ago. As a result of improvements in fabrication technology, today's integrated circuits can store many millions of times as much data in the same volume. Further improvements are expected - within 10 years it is expected that silicon chips with a billion transistors will be manufactured. The downside, of course, is that these circuits are extremely fragile. The stored data and the circuits themselves are prone to a host of destructive forces. For example, a single alpha particle does not pose a threat to the writing on a clay tablet, but can change a RAM-cell bit. The problem affects more than just the commodity memory industry, since a larger and larger portion of many kinds of chips consists of memory arrays.

Over the years a vast amount of research has been dedicated to finding ways around this problem. This book, with a bibliography of 525 research papers, is a unique and comprehensive survey of the field. The mechanisms underlying hard and soft errors are described. The techniques for coping with these mechanisms include test and repair algorithms, built-in self-repair, reconfiguration, process and circuit techniques, and error-detecting and correcting codes. The book can be useful for designers, manufacturing engineers, test engineers and researchers.