VHDL Coding Styles and Methodologies [Hardcover]

Ben Cohen (Author)

Book Description

Publication Date: March 31, 1999 | ISBN-10: 0792384741 | ISBN-13: 978-0792384748 | Edition: 2nd

VHDL Coding Styles and Methodologies, Second Edition is a follow-up book to the first edition of the same book and to VHDL Answers to Frequently Asked Questions, first and second editions. This book was originally written as a teaching tool for a VHDL training course. The author began writing the book because he could not find a practical and easy-to-read book that gave in-depth coverage of both the language and coding methodologies. This new edition provides practical information on reusable software methodologies for the design of bus functional models for testbenches. It also provides guidelines in the use of VHDL for synthesis. Model Technology graciously included an evaluation version of ModelSim, a recognized industry standard VHDL/Verilog compiler and simulator that supports easy viewing of the models under analysis, along with many debug features. In addition, Synplicity is kindly making available an evaluation version of Synplify, a very efficient, user-friendly and easy-to-use FPGA synthesis tool. Synplify provides a user with both the RTL and gate-level views of the synthesized model, and a performance report of the design. Optimization mechanisms are provided in the tool. VHDL Coding Styles and Methodologies, Second Edition is intended for professional engineers as well as students. It is organized in thirteen chapters, each covering a separate aspect of the language, with complete examples. It provides a practical approach to learning VHDL. Combining methodologies and coding styles, along with VHDL rules, leads the reader in the right direction from the beginning.

Product Details

• Hardcover: 480 pages
• Publisher: Springer; 2nd edition (March 31, 1999)
• Language: English
• ISBN-10: 0792384741
• ISBN-13: 978-0792384748
• Product Dimensions: 10.1 x 6.8 x 1.2 inches
• Shipping Weight: 2.6 pounds (View shipping rates and policies)
• Average Customer Review: 4.7 out of 5 stars  See all reviews (6 customer reviews)
• Amazon Best Sellers Rank: #579,208 in Books (See Top 100 in Books)
  • #90 in Books > Computers & Technology > Computer Science > Software Engineering > Methodology

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Customer Reviews

Most Helpful Customer Reviews

11 of 11 people found the following review helpful:

3.0 out of 5 stars Very Difficult to Read, April 21, 2004

By 

Julius Caesar (United States) - See all my reviews

Amazon Verified Purchase

This review is from: VHDL Coding Styles and Methodologies (Hardcover)

As the title said, this book has a lot of good examples on how to write VHDL code with good coding styles. Most of the good coding style tips in the book make sense and I use it in my work. However, I don't think this is a good book to learn VHDL. The syntax is explained in the same style as the VHDL Language Reference Manual, which is very dry. For example: the author explained the syntax of for loop like this: loop_statement ::= [loop_label][iteraction_scheme] loop sequence_of_statements end loop [loop_label]. I learned some VHDL constructs from this book but they are not very clear. After finished reading the book, I still feel something missing and I need to refer to other VHDL books to fill up the gap. The author also spent only a few pages on synthesis and the index is poorly organized. With all of these and combined with its ridiculous price, I would recommend to borrow the book from library if you want some tips on good coding styles. But I won't recommend to buy it if you want to learn basic VHDL, because the book is no good for that purpose.

8 of 8 people found the following review helpful:

5.0 out of 5 stars Best practical book I have read yet., August 8, 2000

By A Customer

This review is from: VHDL Coding Styles and Methodologies (Hardcover)

This is an excellent book for the practicing engineer who wants a real world example. The book has many examples of code which will compile and work. In addition it has recommendations on best practices ( 2 thumbs up) and worst practices (2 thumbs down) with a rational for why you would want to follow the recommended practice. It also makes clear distinction between sythesizable code, and behavioral code. Compared with the other books which are heavy on the language semantics (and examples that won't compile) this is a much more usable book. The hardware desiner will find this to be the best book they have.

10 of 11 people found the following review helpful:

5.0 out of 5 stars What a book!, April 24, 2001

By 

L. Riggs "Lee" (Denver, CO United States) - See all my reviews
(REAL NAME)   

This review is from: VHDL Coding Styles and Methodologies (Hardcover)

This book has just become my number one book to recommend to the students of the VHDL classes that I teach. It is very well written and the book is loaded with VHDL examples demonstrating the various constructs, statements and issues. In example 5.5.1.2, the author does the best job I have ever seen of explaining the difficult subject of "Projected Output". The subjects are frequently associated to the specifications found in the Language Reference Manual. When there is a linking issue between two or more design elements, the linking is clearly demonstrated with examples. The only negative is that the author spends far too much time and book space describing ways to "Enhance Readibility" or documenting your design--which is always a personal preference. But still, a five star book.