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VHDL for Logic Synthesis [Hardcover]

Andrew Rushton (Author)
5.0 out of 5 stars  See all reviews (3 customer reviews)

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Book Description

July 7, 1998 047198325X 978-0471983255 2
VHDL for Logic Synthesis Second Edition Andrew Rushton TransEDA Limited, Southampton, UK Very high-speed integrated circuit Hardware Description Language (VHDL) is the worldwide standard for computer-aided electronic system design. Logic synthesis automates gate-level design, allowing the designer to concentrate on a rgister-transfer level implementation. VHDL for Logic Synthesis provides comprehensive coverage of the language and its role in the generation of hardware. This enhanced second edition takes a broader view of the use of synthesis and its place in the design cycle. Features include:
* Explanation of each aspect of the language in hardware terms and demonstration of the mapping from VHDL to hardware
* Updated examples using the standard packages numeric_std and std_logic_1164 plus more illustrative models offering further source references for designers
* Additional chapter on std_logic_arith to aid designers still working with this popular package
* New focus on libraries and library management covering the contents of the standard library, how to use library work and recommendations on code management
* Extra section detailing how to use assertions to report diagnostics, allowing the reader to print signal and variable values to the screen
Senior undergraduate and postgraduate students of microelectronics and digital hardware engineers new to language-based design methods will appreciate Rushton's informative introduction to VHDL and its use in logic synthesis.

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Editorial Reviews

From the Publisher

VHDL (Very high-speed circuit Hardware Description Language) is firmly established in an industrial context, and is the worldwide standard for computer-aided electronic system design. This title focuses on logic synthesis, or the design-to-implementation phase of the VHDL cycle in generating the hardware. VHDL for Logic Synthesis was originally written as an introductory and reference text on VHDL for engineers intending to use logic synthesis, but the updated and revised second edition is intended for a broader readership by providing comprehensive coverage of the VHDL language and its use in the process of generating hardware.

From the Back Cover

VHDL for Logic Synthesis Second Edition Andrew Rushton TransEDA Limited, Southampton, UK Very high-speed integrated circuit Hardware Description Language (VHDL) is the worldwide standard for computer-aided electronic system design. Logic synthesis automates gate-level design, allowing the designer to concentrate on a rgister-transfer level implementation. VHDL for Logic Synthesis provides comprehensive coverage of the language and its role in the generation of hardware. This enhanced second edition takes a broader view of the use of synthesis and its place in the design cycle. Features include:
* Explanation of each aspect of the language in hardware terms and demonstration of the mapping from VHDL to hardware
* Updated examples using the standard packages numeric_std and std_logic_1164 plus more illustrative models offering further source references for designers
* Additional chapter on std_logic_arith to aid designers still working with this popular package
* New focus on libraries and library management covering the contents of the standard library, how to use library work and recommendations on code management
* Extra section detailing how to use assertions to report diagnostics, allowing the reader to print signal and variable values to the screen
Senior undergraduate and postgraduate students of microelectronics and digital hardware engineers new to language-based design methods will appreciate Rushton's informative introduction to VHDL and its use in logic synthesis.

Product Details

  • Hardcover: 390 pages
  • Publisher: Wiley; 2 edition (July 7, 1998)
  • Language: English
  • ISBN-10: 047198325X
  • ISBN-13: 978-0471983255
  • Product Dimensions: 9.7 x 6.8 x 1.1 inches
  • Shipping Weight: 1.9 pounds (View shipping rates and policies)
  • Average Customer Review: 5.0 out of 5 stars  See all reviews (3 customer reviews)
  • Amazon Best Sellers Rank: #1,668,348 in Books (See Top 100 in Books)

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14 of 15 people found the following review helpful:
5.0 out of 5 stars Great tutorial, June 15, 1999
By A Customer
This review is from: VHDL for Logic Synthesis (Hardcover)
I am an EE but spent most of my career programming in C. This book is an excellent tutorial, beginning with the basics and gradually covering the more complex aspects of VHDL. It clearly explains the difference between sequential (traditional) programming and concurrent programming--both are used in VHDL. It also clearly defines the differences between the modelling stage (not covered in detail) and the design stage (Register Transfer Level - which is covered in great detail). Finally, he explains how to set up a test bench. Within 2 months of reading this book, other engineers were coming to me for advice. I literally wore out the binding!
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6 of 8 people found the following review helpful:
5.0 out of 5 stars Plusses/Minuses, April 18, 2002
By 
"vincebcollins" (Orlando, Florida United States) - See all my reviews
This review is from: VHDL for Logic Synthesis (Hardcover)
+'s This is an excellent book for the one that has an inkling
of what VHDL is about.
There is a lot of detail of language definition and how the
language came about.
This author is very good at explaining a point.

-`s There is very little in this reference concerning non-
synthesisable code AND why can't folks index books? I would
really like to buy a book that I didn't have to re-read to
revisit a particular detail, L

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5.0 out of 5 stars AWESOME!!!, September 28, 2011
Amazon Verified Purchase(What's this?)
An awesome book! Recommended for all Digital System beginners! Very clear and very understandable :) It clearly explains the structure of the VHDL code
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First Sentence:
From its conception, VHDL was intended to support all levels of the hardware design cycle. Read the first page
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Isb Figure, Design Automation Standards Committee, Synopsys Incorporated
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