Customer Reviews

A VHDL Primer

5 star:		(3)
4 star:		(1)
3 star:		(3)
2 star:		(1)
1 star:		(1)

 

 

Yet another book that you must already be an expert to understand what is being discussed. Very disorganized. You have to skip around alot to make anything connect.

Another caution: This is based on VHDL-1993 which is as yet incompatible with a significant number of CAE tools.

I recommend this text for anyone curious about the capabilities of the language. It includes plenty of great examples of VHDL's power and flexibility to model digital behavior. A great companion to flesh out what was originally published in the IEEE Std 1076. Engineers involved with simulation will find Chapter 11. "Model Simulation" very useful; however, if you're an electronic engineer seeking quick answers to design an ASIC or FPGA - look somewhere else...

I am a graduate student doing my Major in digital VLSI design. I strongly urge people to read the book written by Mr. Jayaram Bhasker on VHDL.I feel that there are no prerequisites for reading this. The main highlight of the book is the simplicity with which its written. The author has really taken pains to make students understand difficult ideas with ease.The other most striking feature are ample signal wave diagrams which YOU DONT FIND IN ANY OTHER BOOKS. My favorite chapter is the tutorial in Chapter2 and the last chapter on STATE MACHINES.

I have gone through some other books but they never give fully written code examples. Mr. Bhasker has given complete code examples which you can synthesize easily and get the satisfaction of practically writing the code in a short time and observe the wave forms.

This book is an excellent study material for people interested in learning VHDL .

- Sameer Kadam

This is the WORST VHDL book there is. Don't buy this book if you plan to synthesize your code. The book looks good, but many examples are just plain wrong. This book is flamed in the industry.

Buy Ashenden's Designer's Guide to VHDL if you need a good reference.

I am a student who has used this book as the required text for an inroductory VHDL course. It is extremely helpful in understanding VHDL processes and modeling techniques, but the author has a tendency to throw around jargon that a true beginner (as I was) may find hard to follow, and his rather poorly explained syntactical models can be difficult to understand. I'd definitely recommend this book to anyone who wants to truly understand VHDL from the ground up, but if this really is your first exposure to VHDL, I'd also strongly recommend some sort of a reference book on VHDL syntax.

I'm a programmer and engineer. I am new to the world of VHDL and found this book a pretty good introduction to the structure and syntax of VHDL. I was pleased with the examples, but there were some sections that weren't covered as much as I would like, such as how to use multiple behaviors for a given entity.

This book nicely starts with the simple code writing and progresses to more complex topics in VHDL.The good thing is the author explained almost every topic with good clarity and has well connected different topics.I hope the next edition comes with more examples on test bench. A very keen information about the different types of modelling also helps to have a good attacking style for a sound digital designing. I would recommend this book to any beginner and there is no doubt this book is well fragmented with techniques about VHDL coding almost in every page.

I'm a VHDL instructor and recommend this title to my students. It's concise and well organized. My only complaint is I wish there were more information on testbench construction.

I have taught VHDL and Verilog for a number of years and find this book to be one of the best "basics" book on the market. One MUST read it slowly in order to absorb all the details given. Although I like the book, it comes up short in gluing subjects together--something I insist on in a book and in the classroom. More examples would be helpful and a little overview-flowcharting would help.