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VHDL: A logic synthesis approach
 
 
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VHDL: A logic synthesis approach [Hardcover]

D. Naylor (Author), S. Jones (Author)
4.5 out of 5 stars  See all reviews (2 customer reviews)

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Book Description

0412616505 978-0412616501 January 15, 1997 1
This book is structured in a practical, example-driven, manner. The use of VHDL for constructing logic synthesisers is one of the aims of the book; the second is the application of the tools to the design process. Worked examples, questions and answers are provided together with do and don'ts of good practice. An appendix on logic design the source code are available free of charge over the Internet.

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Product Details

  • Hardcover: 352 pages
  • Publisher: Springer; 1 edition (January 15, 1997)
  • Language: English
  • ISBN-10: 0412616505
  • ISBN-13: 978-0412616501
  • Product Dimensions: 9.2 x 6.2 x 0.8 inches
  • Shipping Weight: 1.2 pounds (View shipping rates and policies)
  • Average Customer Review: 4.5 out of 5 stars  See all reviews (2 customer reviews)
  • Amazon Best Sellers Rank: #4,092,497 in Books (See Top 100 in Books)

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2 of 2 people found the following review helpful:
5.0 out of 5 stars Good book on VHDL Synthesis, March 25, 2002
This review is from: VHDL: A logic synthesis approach (Hardcover)
This book is excellent for the topic - logic sythesis. It has an introduction to VHDL, however I found that "VHDL Starters Guide" was better if you are just starting off. However at any rate this is a good book on VHDL. There is a lot of examples in the book, which makes it easy to understand and use. It does have a focus on sythesis, with such topics of optimizing your code using different tecniques. It also talks about good coding of VHDL. If you know at least some VHDL and are interested in synthesising your designs, this book should be useful for you.
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1 of 2 people found the following review helpful:
4.0 out of 5 stars Good and Clear explanation of the main points, August 19, 1998
By A Customer
This review is from: VHDL: A logic synthesis approach (Hardcover)
I'm a CS student and needed to know more about VHDL for a project. I looked at a range of books and found some of them way too deep for me. This one seemed clearly written and had lots of neat examples.

What I liked best was that the books show 3 different ways fo designing circuits. I learnt a lot about VHDL design styles from that

There were some mistakes in the code (eg bit-width ofa circuit vaired from 4 to 5 bits in different parts of the code) but thats about it

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Inside This Book (learn more)
First Sentence:
The traditional way to design electronic circuits is as follows: firstly, specification of the behaviour of the systems; secondly simulation of the behaviour; thirdly, transformation of this behavioural description into a dataflow; fourthly, structural description, verifying along the way that each decomposition stage maintains the exact behaviour as detailed in the behavioural specification. Read the first page
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
synchronous section, logic synthesis software, longest input, sequence follower, structural style architectures, combinational section, two concurrent statements, multivalued logic systems, synthesis tool vendors, synthesized circuit, duplicated logic, gate entity, behavioural architectures, integer adder, optimized circuit, declarative part, display converter, synthesis statistics, unconstrained type, decoder component, optimization statistics, signal assignment statement, port map, mode inout, dataflow style
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Cells Transistors Area Longest, Parameters Temperature, Optimization Type, While Loop, Parameters Synthesis Optimization Temperature, Synthesis Library, Parameters Optimization Temperature, Parameters Synthesis Temperature, Synthesis Optimization Library
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