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VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy
 
 
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VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy [Paperback]

Liming Xiu (Author)
5.0 out of 5 stars  See all reviews (2 customer reviews)

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Book Description

0470127422 978-0470127421 November 16, 2007 1
This book was written to arm engineers qualified and knowledgeable in the area of VLSI circuits with the essential knowledge they need to get into this exciting field and to help those already in it achieve a higher level of proficiency. Few people truly understand how a large chip is developed, but an understanding of the whole process is necessary to appreciate the importance of each part of it and to understand the process from concept to silicon. It will teach readers how to become better engineers through a practical approach of diagnosing and attacking real-world problems.

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Editorial Reviews

From the Back Cover

An accessible, intuitive resource to common—and not-so-common—questions and answers about very large-scale integrated (VLSI) circuit design

The widespread acceptance of sophisticated electronic devices and the growing challenges of a more technically oriented future have created an unprecedented demand for very large-scale integrated (VLSI) circuits. Meeting this crucial need requires advances in material science and processing equipment along with the ability to use the computer more effectively to aid in the design process. More importantly, it also requires a significant number of qualified professionals to work in this exciting field. Unfortunately, due to its complexity and dynamic nature, the topic of VLSI circuit design methodology is not widely taught in universities nor is it well understood by many engineers. Now, VLSI Circuit Design Methodology Demystified takes the guesswork out of this important topic by presenting readers with a succinct and accessible treatment of how a complex chip is developed, from concept to silicon.

Uniquely organized in a question-and-answer format, the book builds on information in the order of chip development: market research/product definition, system design, logic design, logic verification, logic synthesis, Place & Route, and physical verification. A wealth of important questions are addressed, including:

  • What are the requirements of a successful chip design?

  • What are the major approaches of today's VLSI circuit design practices?

  • What are the major process steps in building MOSFET transistors?

  • What is the role of functional verification in the IC design process?

  • What are the two major aspects of ASIC design flow?

  • What is Hardware Description Language (HDL)?

  • What is the most commonly used model in VLSI circuit testing?

  • What are the qualities of a good IC implementation designer?

The answers to these questions and many more provide the framework for understanding the key concepts involved in the VLSI chip development process, giving readers a solid foundation for further advancement in the field. Written by an industry expert, the book uses up-to-date, real-world design examples to demonstrate to readers how to become better engineers through a practical approach of diagnosing and attacking problems. Ideal as a resource for electrical engineers specializing in integrated circuit design in the semiconductor industry, this book is also suitable as a supplementary text for students enrolled in advanced VLSI courses.

About the Author

Liming Xiu is a Design Engineer and a Senior Member of Technical Staff (SMTS) at Texas Instruments, Inc. His interests include digital and mixed-signal integrated circuit design and VLSI physical design. He has worked on various mixed-signal devices, including video decoders, 3-D graphics controllers, and HDTV decoders, as physical design lead. He is also a Phase Lock Loop (PLL) expert. He is the inventor of "Flying-Adder" frequency and phase synthesis architecture, which has been used in many commercial products. He has eleven granted or pending U.S. patents. He is a Senior Member of the IEEE and the general chair of the IEEE Circuit and Systems Society, Dallas Chapter.


Product Details

  • Paperback: 202 pages
  • Publisher: Wiley-IEEE Press; 1 edition (November 16, 2007)
  • Language: English
  • ISBN-10: 0470127422
  • ISBN-13: 978-0470127421
  • Product Dimensions: 6.2 x 0.6 x 9.3 inches
  • Shipping Weight: 13.4 ounces (View shipping rates and policies)
  • Average Customer Review: 5.0 out of 5 stars  See all reviews (2 customer reviews)
  • Amazon Best Sellers Rank: #515,275 in Books (See Top 100 in Books)

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2 of 2 people found the following review helpful:
5.0 out of 5 stars happy reading, January 6, 2008
This review is from: VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy (Paperback)
'VLSI Circuit Design Methodology Demystified', is aptly named for its
rich content covering a wide span of issues confronting today's
nanometer scale ICs.
This book will prove to be very useful for managers who are seeking to
understand challenges in ASIC world and for engineers wanting to enhance their skills in innovative methodologies.
It is very handy for anyone working in physical design. It is very easy for an engineer to become too focused in one or two specific areas like place and route or timing and not understand the big picture. It's a very good reference book for entry level engineers as well as job seekers.
The Q&A style of this book makes the understanding of this difficult topic very lucid.
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2 of 2 people found the following review helpful:
5.0 out of 5 stars A great book for everyone who is involved or interested in chip business, November 18, 2007
This review is from: VLSI Circuit Design Methodology Demystified: A Conceptual Taxonomy (Paperback)
This is a great book for everyone who is currently involved or interested in chip design/implementation/verification/manufacture business. The book primarily focuses on concepts, not mathematic formulas. Concepts are the foundation. Without correct concepts in one's knowledge base, it is difficult to truly understand what is really going on behind the tools you are dealing with everyday, it is difficult to advance in any technical field (especially in this ultra-complicated chip design business).

The intention of this book is "broad" not necessarily "deep". The goal is to introduce all the key concepts needed to build up the foundation. To get involved deeper in any of the topics, the reader is equipped with basic knowledge so that he/she can consult more specialized resources (conference paper, journal paper, special-topic book, tool manual, datasheet, etc.)

The unique features of this book: a) covering very board areas of IC design. It is a good reference source when someone needs an overview of this field. b) organizing in the question and answer fashion, needed information can be located quickly.

Audience:
a. IC integration engineer with several years' experience needs to see bigger picture, needs to expend his knowledge base, for further advance.

b. IC circuit designer (transistor-level circuit designer, analog component designer and etc.) who needs to know what is going on in SoC integration area.

c. IC testing engineer, product engineer, CAD support engineer who want to know more about chip development process.

d. Process development researcher/engineer who wants to know what is happening in design.

e. Project/business/marketing manager who needs the overview of this field, needs to know what is going on within design team (so that they can understand why "over-budget, behind-schedule" always happens :)).

f. University/college students (graduate student level) who want to pursuit career in the field of IC design. (The courses offered by universities usually focus on the basic knowledge and techniques needed for circuit design. There is hardly anything for large chip implementation.)

g. Anyone who is interesting in knowing what is going on in the field of IC design.


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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
circuit design methodology, good design flow, scan chain reordering, length skew, leakage current problem, testable circuit, sequential cells, clock tree synthesis, code coverage analysis, static timing analysis, scan insertion, logic effort, chip reliability, timing closure, clock sinks, equivalence check, clock structure, insertion delay, prime inputs, parasitic extraction, time skew, timing verification, physical verification, fault coverage, test circuitry
Key Phrases - Capitalized Phrases (CAPs): (learn more)
Semiconductor Lithography
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