Second edition describes more features, has expanded test bench modeling section, more examples explaining constructs and has exercises to every chapter.
FREE Two-Day Shipping for Students. Learn more |
| ||||||||||||||||||||||||
Book Description
Editorial Reviews
Review
""A Verilog HDL Primer" is really excellent" -- Yang Cao, Lucent Technologies
"I have found the book easy to read, to the point, and an excellent reference" -- Sharad Seth, University of Nebraska at Lincoln
"I read your books and I found them tremendously useful. Actually, these texts "A VHDL Primer" and "A Verilog HDL Primer" introduced me to VHDL and verilog respectly. The books were easy to read and understand. They are wonderful introductory texts. In fact, I still reference them. I would recommend them as text for a course as part of a freshmen's Electrical Engineering curriculum" -- Lincoln A. McLoud, Bell Labs
"I really considered your Verilog HDL Primer book as the best out of the four books I reviewed this semester" -- Dr. Gabriel Thomas, University of Texas at El Paso
"In my current job where I need to create testcases in Verilog, I need a text where I can look in the index and reference quickly an example of a particular construct. That is what I like best about "A Verilog HDL Primer". The index has an extensive list of the verilog constructs. The text has easy to understand examples of how the construct is used not just the BNF format. It has become the only verilog reference book that I use" -- Jean Witinski, Lucent Technologies
"It is a good book overall. I think people will find it useful" -- Gabe Moretti, VeriBest
"Like your books on VHDL and Synthesis, this book too is easy to read and understand" -- Sanjana Nair
"I have found the book easy to read, to the point, and an excellent reference" -- Sharad Seth, University of Nebraska at Lincoln
"I read your books and I found them tremendously useful. Actually, these texts "A VHDL Primer" and "A Verilog HDL Primer" introduced me to VHDL and verilog respectly. The books were easy to read and understand. They are wonderful introductory texts. In fact, I still reference them. I would recommend them as text for a course as part of a freshmen's Electrical Engineering curriculum" -- Lincoln A. McLoud, Bell Labs
"I really considered your Verilog HDL Primer book as the best out of the four books I reviewed this semester" -- Dr. Gabriel Thomas, University of Texas at El Paso
"In my current job where I need to create testcases in Verilog, I need a text where I can look in the index and reference quickly an example of a particular construct. That is what I like best about "A Verilog HDL Primer". The index has an extensive list of the verilog constructs. The text has easy to understand examples of how the construct is used not just the BNF format. It has become the only verilog reference book that I use" -- Jean Witinski, Lucent Technologies
"It is a good book overall. I think people will find it useful" -- Gabe Moretti, VeriBest
"Like your books on VHDL and Synthesis, this book too is easy to read and understand" -- Sanjana Nair
From the Back Cover
With this book, you can:
- Learn Verilog HDL the fast and easy way.
- Obtain a thorough understanding of the basic building blocks of Verilog HDL.
- Find out how to model hardware.
- Find out how to test the hardware model using a test bench.
Product Details
Would you like to update product info or give feedback on images?
|
More About the Author
Discover books, learn about writers, read author blogs, and more.
Customer Reviews
|
Share your thoughts with other customers:
|
||||||||||||||||||||||
|
Most Helpful Customer Reviews
15 of 16 people found the following review helpful:
5.0 out of 5 stars
An excellent introduction and reference,
By A Customer
This review is from: A Verilog HDL Primer, Second Edition (Hardcover)
This is a very good introduction to Verilog coding. I read the book prior to taking a formal Verilog class, and walked into the class very well prepared. The book is well organized, and the index is very complete, which is good for newbies (like myself) who still need a syntax and usage reference.
12 of 13 people found the following review helpful:
2.0 out of 5 stars
Regurgitation of LRM,
By A Customer
This review is from: A Verilog HDL Primer, Second Edition (Hardcover)
This book is basically a regurgitation of the language reference manual and really does not give the reader any insight into when and how to use particular language constructs. For example on page 148 the author discusses module ports and has an example of a port redeclaration, but he neglects to discuss why you would wish to redeclare a port as a wire. If you are learning Verilog because you are going to use it in an actual design look elsewhere.
4 of 4 people found the following review helpful:
3.0 out of 5 stars
A little disappointed,
By
Amazon Verified Purchase(What's this?)
This review is from: A Verilog HDL Primer, Second Edition (Hardcover)
With such a high rating, I had hoped for something better.
If you are looking for a very introductory lesson on the workings of Verilog, this is for you. However if you are looking for something that will help you learn to write complex code, this is not it. My biggest complaint is that this book needs to be hit pretty hard by an editor who actually understands Verilog enough to find the syntax errors and omissions in the example code. If this is supposed to be a "primer" all of the examples should be technically and syntactically correct, and they are not. I am able to find mistakes and this is my first foray into Verilog. Also note: this does not teach anything about synthesizable code. That's another book, but the difference is never even mentioned. Almost everything in this book will help you learn how to write test benches for you synthesizable modules.
Share your thoughts with other customers: Create your own review
|
|
Inside This Book
(learn more)
First Sentence:
Verilog HDL is a hardware description language that can be used to model a digital system at many levels of abstraction ranging from the algorithmic-level to the gate-level to the switch-level. Read the first page Key Phrases - Capitalized Phrases (CAPs): (learn more)
Div State, Half Adder, New Reg, Art Top, Delayed Wave, Modeling Simple Elements, Reverse Bits New!
Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
Verilog HDL is a hardware description language that can be used to model a digital system at many levels of abstraction ranging from the algorithmic-level to the gate-level to the switch-level. Read the first page Key Phrases - Capitalized Phrases (CAPs): (learn more)
Div State, Half Adder, New Reg, Art Top, Delayed Wave, Modeling Simple Elements, Reverse Bits New!
Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Back Cover | Surprise Me!
What Other Items Do Customers Buy After Viewing This Item?
Tags Customers Associate with This Product(What's this?)Click on a tag to find related items, discussions, and people.
|
Sell a Digital Version of This Book in the Kindle Store
If you are a publisher or author and hold the digital rights to a book, you can sell a digital version of it in our Kindle Store.
Learn more
Customer Discussions
|
This product's forum
Active discussions in related forums
Search Customer Discussions
|
Related forums
|
