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The Verilog PLI Handbook: A User's Guide  and Comprehensive Reference on the Verilog Programming Language Interface (The Kluwer International Series ... Series in Engineering and Computer Science)
 
 
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The Verilog PLI Handbook: A User's Guide and Comprehensive Reference on the Verilog Programming Language Interface (The Kluwer International Series ... Series in Engineering and Computer Science) [Large Print] [Hardcover]

Stuart Sutherland (Author)
4.8 out of 5 stars  See all reviews (5 customer reviews)

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Book Description

0792376587 978-0792376583 February 28, 2002 2nd
The Verilog Programming Language Interface is a powerful feature of the Verilog standard. Through this interface, a Verilog simulator can be customized to perform virtually any engineering task desired, such as adding custom design debug utilities, adding proprietary file read/write utilities, and interfacing bus functional C language models to a simulator. This book serves as both a user's guide for learning the Verilog PLI, and as a comprehensive reference manual on the Verilog PLI standard. Both the TF/ACC ("PLI 1.0") and the VPI ("PLI 2.0") generations of the PLI are presented, based on the IEEE 1364 Verilog standard. The second edition of this book adds detailed coverage of the many enhancements added in the latest IEEE 1364-2001 Verilog standard ("Verilog-2001").

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Editorial Reviews

Review

"The Verilog PLI Handbook is the best book written about the PLI. Use it once, and it will pay for itself by saving you a great deal of time. The book brings clarity to the Verilog Programming Language Interface. The descriptions and extensive examples shed new light on the many dark corners of the PLI. Stuart Sutherland has produced the definitive guide, covering all versions and uses for the PLI. I recommend this book to all Verilog users who want to learn about the PLI." (Chris Spear, Verification Consultant, Synopsys, Inc.)

Product Details

  • Hardcover: 808 pages
  • Publisher: Springer; 2nd edition (February 28, 2002)
  • Language: English
  • ISBN-10: 0792376587
  • ISBN-13: 978-0792376583
  • Product Dimensions: 9.5 x 6.1 x 1.8 inches
  • Shipping Weight: 2.8 pounds (View shipping rates and policies)
  • Average Customer Review: 4.8 out of 5 stars  See all reviews (5 customer reviews)
  • Amazon Best Sellers Rank: #1,822,111 in Books (See Top 100 in Books)

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4.8 out of 5 stars (5 customer reviews)
 
 
 
 
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4 of 4 people found the following review helpful:
5.0 out of 5 stars Excellent descriptions and examples of Verilog PLI, May 7, 1999
By A Customer
This book brings clarity to the Verilog Programming Language Interface. The descriptions and examples shed new light on aspects of the PLI that had previously been murky. Stuart Sutherland has produced the definitive guide to all versions of the PLI. I highly recommend this book to all Verilog users who want to learn the PLI. The first time you use an example from the book, you will save hours compared to flipping through the IEEE manual.
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2 of 2 people found the following review helpful:
5.0 out of 5 stars The right tool for the job., December 10, 1999
This book is a must have, if you are writing PLI applications for any Verilog simulator. If you don't need to do that, then, well the book isn't for you. If you do, the price is very cheap, considering the time savings you will realize.
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1 of 1 people found the following review helpful:
5.0 out of 5 stars Clear explanations with good examples., October 12, 1999
By A Customer
Very good coverage of a difficult topic. Well written and easy to understand. A must if you are doing PLI work!
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Inside This Book (learn more)
Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
calltf routine, misctf routine, task arg, system task instance, assignment update events, int paramvc, simulation callback, current logic value, free iterator, complete object diagram, hierarchical path name, value change link, pulse reject limit, system task name, named statement group, int reason, active event list, cont assign, verilog time, shell module, module path delay, reading logic values, vector logic values, logic value changes, simulation data structure
Key Phrases - Capitalized Phrases (CAPs): (learn more)
The Verflog, Microsoft Windows, Programming Language Interface, Registration Data, Bit Mapping Verilog, Verilog Hardware Description Language, Arithmetic Logic Unit, Cadence Design Systems, Constant Definition, Format Definition, David Roberts, Math Library Operation, Model Technology, Models Using, Quick Reference Guide, Reason Constant Description, Step One
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