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Editorial Reviews
Book Description
The latest information from the leading network processor designers in research and industry.
Product Description
Responding to ever-escalating requirements for performance, flexibility, and economy, the networking industry has opted to build products around network processors. To help meet the formidable challenges of this emerging field, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers to discuss latest research in the architecture, design, programming, and use of these devices. This series of volumes contains not only the results of the annual workshops but also specially commissioned material that highlights industry's latest network processors.
Like its predecessor volume, Network Processor Design: Principles and Practices, Volume 2 defines and advances the field of network processor design. Volume 2 contains 20 chapters written by the field's leading academic and industrial researchers, with topics ranging from architectures to programming models, from security to quality of service.
See all Editorial Reviews
The latest information from the leading network processor designers in research and industry.
Product Description
Responding to ever-escalating requirements for performance, flexibility, and economy, the networking industry has opted to build products around network processors. To help meet the formidable challenges of this emerging field, the editors of this volume created the first Workshop on Network Processors, a forum for scientists and engineers to discuss latest research in the architecture, design, programming, and use of these devices. This series of volumes contains not only the results of the annual workshops but also specially commissioned material that highlights industry's latest network processors.
Like its predecessor volume, Network Processor Design: Principles and Practices, Volume 2 defines and advances the field of network processor design. Volume 2 contains 20 chapters written by the field's leading academic and industrial researchers, with topics ranging from architectures to programming models, from security to quality of service.
See all Editorial Reviews
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Inside This Book
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First Sentence:
The objective of this second volume on network processor (NP) design is the same as that of the first [1]: to survey the latest research and practices in the design, programming, and application of network processors. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
soft queue, legitimacy list, pipelined topology, multiprocessor routers, pure pipeline, destination tribe, small hash table, network processor design, packet classification algorithms, queuing latency, scheduler scheme, packet dependencies, shaper module, transient buffers, network processor architecture, using network processors, legitimacy tests, large hash table, packet descriptor, module tree, packet forwarder, gate vector, packet processor, execution cores, oldest packet Key Phrases - Capitalized Phrases (CAPs): (learn more)
Fibre Channel, Massively Multithreaded Packet Processor, International Conference, Network Search Engine, Power Considerations, Exploring Trade-Offs, High-Speed Legitimacy-Based, Worst-Case Execution Time Estimation, International Symposium, Department of Computer Science, Implementing Voice, Real-Time Systems Symposium, Computer Society, Intel Corp, Palo Alto, Reference Manual, Teja Technologies, University of California, High Performance Computer Architecture, Optional Optional, Cisco Systems, Design Automation Conference, Dynamic Module Manager, Euromicro Conference, First Workshop New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Surprise Me!
The objective of this second volume on network processor (NP) design is the same as that of the first [1]: to survey the latest research and practices in the design, programming, and application of network processors. Read the first page Key Phrases - Statistically Improbable Phrases (SIPs): (learn more)
soft queue, legitimacy list, pipelined topology, multiprocessor routers, pure pipeline, destination tribe, small hash table, network processor design, packet classification algorithms, queuing latency, scheduler scheme, packet dependencies, shaper module, transient buffers, network processor architecture, using network processors, legitimacy tests, large hash table, packet descriptor, module tree, packet forwarder, gate vector, packet processor, execution cores, oldest packet Key Phrases - Capitalized Phrases (CAPs): (learn more)
Fibre Channel, Massively Multithreaded Packet Processor, International Conference, Network Search Engine, Power Considerations, Exploring Trade-Offs, High-Speed Legitimacy-Based, Worst-Case Execution Time Estimation, International Symposium, Department of Computer Science, Implementing Voice, Real-Time Systems Symposium, Computer Society, Intel Corp, Palo Alto, Reference Manual, Teja Technologies, University of California, High Performance Computer Architecture, Optional Optional, Cisco Systems, Design Automation Conference, Dynamic Module Manager, Euromicro Conference, First Workshop New!
Books on Related Topics | Concordance | Text Stats Browse Sample Pages:
Front Cover | Table of Contents | First Pages | Index | Surprise Me!
Citations (learn more)
This book cites 8
books:
See all 8 books this book cites
- Linear Programming and Extensions by George Dantzig on page 72
- High Performance Memory Systems by Haldun Hadimioglu in Front Matter
- Computer-Aided Design (Addison-Wesley Series in Mechanical Engineering) by Dean L. Taylor on page 226
- Network Calculus: A Theory of Deterministic Queuing Systems for the Internet (Lecture Notes in Computer Science) by Jean-Yves Le Boudec on page 157
- Optical Communications: Components And Systems by Jurgen Franz on page 98
See all 8 books this book cites
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