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Computer Architecture: A Quantitative Approach, 4th Edition 4th Edition
There is a newer edition of this item:
$82.46
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Purchase options and add-ons
- Increased coverage on achieving parallelism with multiprocessors.
- Case studies of latest technology from industry including the Sun Niagara Multiprocessor, AMD Opteron, and Pentium 4.
- Three review appendices, included in the printed volume, review the basic and intermediate principles the main text relies upon.
Review
“The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of covering most of the major architectural approaches employed today. --William Wong, Electronic Design, November 2006
“Computer hardware is entering into a new era, what with multicore processing, virtualization and other enhancements … Computer Architecture covers these topics and updates the insightful work in the earlier editions that laid out the full range of metrics needed for evaluating processor performance. --Joab Jackson, GCN, November 20, 2006
Review
About the Author
David Patterson is the Pardee Professor of Computer Science, Emeritus at the University of California at Berkeley, which he joined after graduating from UCLA in 1977.His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Prof. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Prof. Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM, CRA, and SIGARCH.
- ISBN-100123704901
- ISBN-13978-0123704900
- Edition4th
- PublisherMorgan Kaufmann
- Publication dateSeptember 27, 2006
- LanguageEnglish
- Dimensions7.5 x 1 x 9 inches
- Print length704 pages
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Product details
- Publisher : Morgan Kaufmann; 4th edition (September 27, 2006)
- Language : English
- Paperback : 704 pages
- ISBN-10 : 0123704901
- ISBN-13 : 978-0123704900
- Item Weight : 2.44 pounds
- Dimensions : 7.5 x 1 x 9 inches
- Best Sellers Rank: #705,105 in Books (See Top 100 in Books)
- #70 in Computer Programming Logic
- #182 in Computer Hardware Design & Architecture
- #31,638 in Unknown
- Customer Reviews:
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About the authors

John Leroy Hennessy (born September 22, 1952) is an American computer scientist, academician, and businessman. Hennessy is one of the founders of MIPS Computer Systems Inc. as well as Atheros and is the tenth President of Stanford University. Marc Andreessen called him "the godfather of Silicon Valley".
Bio from Wikipedia, the free encyclopedia. Photo by Eric Chan [CC BY 2.0 (http://creativecommons.org/licenses/by/2.0)], via Wikimedia Commons.

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It does not cover the absolute latest processors. But it doesn't have to. It will give you the background needed that when you go to the website that have technical details of a new architecture (e.g. Ars Technica), chances are good you will know the concepts they reference.
Who shouldn't buy this: Programmer's in high level languages expecting to learn some black magic way to speed up your code. Even assembly language programmers have been mostly sidelined by the power of a modern CPU to optimize high-level languages.
My only complaint is that though the book is available only with paperback now, they didn't reduce the price. It's still worth the price, though.
I think it provided great information for a person who needs understanding of computer architecture .
Though this book is really good.
Thank you.
The book falls in line with most educational books - mediocre at best. The samples are weak and seldom useful. This book is best coupled with classes and online material found via search engine of your choice.
Many universities take the slides and adapt them to their curriculum and post materials accessible online which may be useful.
There are some errors in the book and I have yet to track down the errata (even though they provide a link to a place to find it, seems to be only for professors? Not quite sure what that is about...)
I'm a bit biased, I thought learning about RAID systems, cache optimization, memory optimization, etc - would have been a bit more interesting and challenging. I've mostly found it dull, ancient, and redundant (Zing!).
Top reviews from other countries
Reviewed in India on August 31, 2021
Entspricht meine Anforderungen.
Preis Leistung-Qualität = sehr gut.
bin echt zufrieden damit und kann nur empfehlen
les divers sujet sur le fonctionnement des architecture y sont abordé (optimisation, fonctionnement du pipeline,...).
Excellent investissement.
Anyone requiring a gentler introduction should take a look at Jon Stokes' Inside The Machine. It covers much of the same material but with rather less rigor.
The key word in the title is Quantitative, there are no 'hand-waving' arguments in this text. Highly recommended but not for the faint-hearted.




