- Hardcover: 126 pages
- Publisher: Springer; 1st ed. 2018 edition (October 26, 2017)
- Language: English
- ISBN-10: 3319681605
- ISBN-13: 978-3319681603
- Product Dimensions: 6.1 x 0.4 x 9.2 inches
- Shipping Weight: 10.6 ounces (View shipping rates and policies)
- Average Customer Review: Be the first to review this item
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Design of FPGA-Based Computing Systems with OpenCL 1st ed. 2018 Edition
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From the Back Cover
This book provides wide knowledge about designing FPGA-based heterogeneous computing systems, using a high-level design environment based on OpenCL (Open Computing language), which is called OpenCL for FPGA. The OpenCL-based design methodology will be the key technology to exploit the potential of FPGAs in various applications such as low-power embedded applications and high-performance computing. By understanding the OpenCL-based design methodology, readers can design an entire FPGA-based computing system more easily compared to the conventional HDL-based design, because OpenCL for FPGA takes care of computation on a host, data transfer between a host and an FPGA, computation on an FPGA with a capable of accessing external DDR memories.
In the step-by-step way, readers can understand followings:
- how to set up the design environment
- how to write better codes systematically considering architectural constraints
- how to design practical applications
- Provides readers with an overview and practical examples of OpenCL-based design methodologies for FPGA-based computing systems;
- Helps software engineers to understand systematically patterns of parallel processing and implement such patterns using OpenCL for FPGAs;
- Includes a variety of design examples of embedded applications such as image processing, and high-performance computing.
About the Author
Waidyasoriya Hasitha Muthumala is an Assistant Professor in the Graduate School of Information Sciences at Tohoku University. He received the BE degree in information engineering, the MS degree in information sciences, and the PhD degree in information sciences from Tohoku University, Japan, in 2006, 2008, and 2010 respectively. His research interests include reconfigurable computing, processor architectures for big-data applications, and high-level design methodology for VLSIs. He is a member of the IEEE.
Masanori Hariyama is a Professor in the Graduate School of Information Sciences at Tohoku University. He received the BE degree in electronic engineering, the MS degree in information sciences, and the PhD degree in information sciences from Tohoku University, Japan, in 1992, 1994, and 1997, respectively. His research interests include real-world applications such as robotics and medical applications, big data applications such as bio-informatics, high-performance computing, VLSI computing for real-world application, high-level design methodology for VLSIs, and reconfigurable computing. He is a member of the IEEE.
Kunio Uchiyama, technical advisor of Hitachi, Ltd., received his BS, MS, and PhD degrees from the Tokyo Institute of Technology. He has worked for the Central Research Laboratory of Hitachi since 1978 on design automation, mainframe computers, microprocessors, multicore processors, and their applications. He led R&D for the commercial SuperH microprocessors from the early 1990s, and he was awarded Japan’s national Medal of Honor with the Purple Ribbon in 2004 for his contribution to the development of commercial high-performance, low-power microprocessors. He also led the New Energy and Industrial Technology Development Organization project in Japan on heterogeneous multicore technologies from 2007 to 2010. He was a guest editor of IEEE Micro in 2005 and served as a general chair of the Asia and South Pacific Design Automation Conference sponsored by IEEE CAS/CEDA in 2015. He has also been a vice chair of the IEEE Symposium on Low-Power and High-Speed Chips, sponsored by the IEEE Computer Society since 2008. He is a member of the IEEE Computer Society, Solid-State Circuits Society, and the Institute of Electronics, Information and Communication Engineers (IEICE). He is a Fellow of IEEE and IEICE, and is a member of Board of Governors of IEEE Computer Society.
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