- Hardcover: 586 pages
- Publisher: Artech House (February 28, 2007)
- Language: English
- ISBN-10: 159693154X
- ISBN-13: 978-1596931541
- Product Dimensions: 1.5 x 7.2 x 10 inches
- Shipping Weight: 2.6 pounds (View shipping rates and policies)
- Average Customer Review: 5.0 out of 5 stars See all reviews (7 customer reviews)
- Amazon Best Sellers Rank: #2,716,388 in Books (See Top 100 in Books)
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Phase-Locked Loop Engineering Handbook for Integrated Circuits
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About the Author
Stanley Goldman is a distinguished member of the technical staff at Texas Instruments, working in the Wireless Mixed Signals Product Group. A widely known author and presenter, holder of several patents, and a senior member of the IEEE, he holds a B.S. in electrical engineering from Carnegie-Mellon University.
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Top customer reviews
If someone were to ask the question - "why should I buy this book versus the rest?" here is what sets this book a class apart.
1. It deals with theory, circuit simulation and testing of PLLs.
2. For those who like math - it has rigorous equations to go with the intuitive analysis. The math is reinforced with examples and SPICE simulations and waveforms. For example section 3.2 - phase noise, 3.5 - acquisition of lock are difficult topics that are presented in a clear manner.
3. For students the extensive references at the back of each chapter will prove very handy. The subjective questions and numerical problems will serve to reinforce understanding of the material. Although the solutions/answers are not shown in the text, this should not discourage anyone from trying the problems out.
4. One of my favorite sections is the chapter 7 on test and measurements.
PLL measurements are to be done with care and the author covers all critical measurements such as jitter and even provides suggestions for instruments to be used and how to set them up. For a test engineer, this is quite obviously a superior method as opposed to learning by trial and error. Sections 7.6 and 7.9 are especially worth reading.
5. My other favorite chapter 8 is on simulation. I have not seen a more concise yet wide coverage of simulation methodology for PLLs in a text yet. The author shows options for transistor level and behavioral modelling, uses simulators such as SPICE and POWERMILL to highlight how different parameters can be tested effectively and indicates how one can visualize non-ideal behaviors.
Although some background is assumed, it is on a level that 3rd year undergraduate students should be able to comprehend. The book starts off with an overview of PLL and its applications in Ch.1. Then it looks at PLLs from a system view in Ch.2. and Ch.3. with Ch.3 concentrating on key design issues such as jitter, locking, and spurs. Ch.4 and Ch.5 concentrate upon the building blocks of the PLL (dividers, oscillators, detectors, and the loop filter). Ch.6 concentrates upon stability. The last three chapters, 7, 8, and 9 concentrate upon real life design of PLLs. Ch.7 discusses the testing of PLLs; Ch.8, with the simulations of PLLs; and Ch.9 with the a discussion of the tradeoffs in the design and big picture effect of PLLs upon the complete system.
This book is not only ideal for a student but also a practicing engineer who may have a rudimentary understanding of PLLs and wishes to learn from the experience of an expert in the field. Unlike other books that deal solely with theory, this book spends a fair amount of time discussing the practical aspects of the design. It actually has SPICE netlists which you can implement to learn about the building blocks or PLL system. But it is thorough as well. Those wishing to delve into the rigorous mathematics will not be disappointed while those who are at a stage where they need a general understanding can gloss over the theory and not lose insight into the operating principles. To cater to both audiences is not an easy thing to accomplish and Mr. Goldman is able to do so because of his expertise in the field and having first-hand design experience in numerous applications.