- Hardcover: 336 pages
- Publisher: Springer; 3rd edition (May 31, 1996)
- Language: English
- ISBN-10: 0792397231
- ISBN-13: 978-0792397236
- Product Dimensions: 6.8 x 0.8 x 9.5 inches
- Shipping Weight: 1.6 pounds (View shipping rates and policies)
- Average Customer Review: 11 customer reviews
- Amazon Best Sellers Rank: #9,162,164 in Books (See Top 100 in Books)
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The Verilog® Hardware Description Language 3rd Edition
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I expect the rest of the book will be as good as the intro, I'll update this if anything changes.
- first chapter, "recommended" by authors for university courses, is extremely chaotic (begin..end blocks are called loops, exercises ask you to use loops before introducing them, etc.)
- cover of the latest edition claims coverage of the latest Verilog standard - unfortunately it is very poor coverage: new interesting features such as libraries and configurations are not mentioned at all!
- I had to work hard during many trainings to correct bad coding styles showing in students reading this book as their first Verilog publication
- the book is grossly overpriced...
- good set of examples
I used this book in an upper level hardware design course. The course had a beginning Verilog course as a prerequisite. I hadn't taken that course but I had experience in digital design and VHDL. This book got me up to speed quickly with it's many examples and tight explanations of the Verilog Language.
-Example designs are short, complete, and simulatable. Most are even synthesizable. This is good because an example can be quickly understood in its entirety. You don't need to flip through and stare and multiple pages to get an idea of what's going on. If you insist on having them, there are two long, practical examples towards the end of the book.
-The text is very well written. Similar in style to 'The C Programming Language by Kernighan and Ritchie.'
-Verilog 2001: Focuses on 2001, which is a little clearer than previous standards. I think all tools support 2001 by default now so that should be used.
-Not enough discussion on how Verilog constructs are compiled and netlisted. This is critically important in FPGA/ASIC design. However, this book is not any worse than other HDL books in this respect. It's just so important, I really haven't seen anything that gives the topic the treatment it deserves.
-Not really for beginners. This is not a hardware design text.
I haven't used the CD that came with the book so I can't comment on that. My guess is anything on that CD is not as good as industry standard tools like Mentor's ModelSim.
Overall a very impressive book that will get you to productivity quickly in a Verilog project.
The only shortcoming of this book is that the authors decided not to cover every llittle bit of verilog, which would have removed the need to consult the standard. Since the standard is so unreadable, I think that this was a crying shame, but I don't think that this will pose a real problem for most readers. Besides, I haven't seen a credible alternative.
I order the book assuming it was a North American Copy Unfortunately The one that I received was printed in CHINA & FULL OF GRAMMATICAL MISTAKES please watch out for the seller "Express_Textbook" do not purchase unless u want a Chinese Version.
The seller does not specify this information so once you have made a transaction you'd have to go through the hassle of returning it.
A NOTE TO AMAZON ADMIN: PLEASE INSIST SELLERS WHEN SELLING NEW PRODUCTS TO SPECIFY DETAILS SO THAT CUSTOMERS CAN MAKE THE RIGHT CHOICE.
Most recent customer reviews
I use Verilog a lot but I still wish I had read this book before writing Verilog codes.
+ A great Index.
+ Good examples.Read more