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100 Power Tips For FPGA Designers Tapa blanda – 17 Junio 2011
Opciones de compra y productos Add-on
- Número de páginas474 páginas
- IdiomaInglés
- Fecha de publicación17 Junio 2011
- Dimensiones7.44 x 0.95 x 9.69 pulgadas
- ISBN-101461186293
- ISBN-13978-1461186298
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- Editorial : CreateSpace Independent Publishing Platform (17 Junio 2011)
- Idioma : Inglés
- Tapa blanda : 474 páginas
- ISBN-10 : 1461186293
- ISBN-13 : 978-1461186298
- Dimensiones : 7.44 x 0.95 x 9.69 pulgadas
- Clasificación en los más vendidos de Amazon: nº764,763 en Libros (Ver el Top 100 en Libros)
- nº50 en Lógica Informática
- Opiniones de clientes:
Sobre el autor

Evgeni Stavinov is a longtime FPGA user with over a decade of diverse design experience. Before becoming a hardware architect at SerialTek LLC, he held different engineering positions at Xilinx, LeCroy and CATC. Evgeni holds MS and BS degrees in electrical engineering from University of Southern California and Technion - Israel Institute of Technology. Evgeni is a creator of OutputLogic.com, a portal that offers different online productivity tools.
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It was written to oriented to the xilinx workspace.
I think for students it's going to be good.
For mature or advanced users, it won't be so impressive.
I view this book as a fairly detailed presentation of the design methodology in the FPGA world. Discussions about engineering tradeoffs abound. I found the book easy to read beginning to end, but I think it's OK to skip the chapters/tips you don't need to read about. A good complement to this book is Advanced FPGA Design by Steve Kilts.
My only complaint is that the book doesn't go deep enough in some subjects, and the Xilinx-heavy focus. Hopefully these will be improved in future editions.
Most of the the tips are very light on explanation. They might be useful as google fodder, but don't expect to really learn much from this book.
There is no doubt that documentation is needed so designers can learn quickly how to use FPGAs effectively. The vendor documentation (from both Xilinx and Altera) is excellent but so extensive as to be overwhelming. A designer may not know where to start, and may not know the design tricks that will save them a lot of trouble. So, a need exists.
Unfortunately, this book does not really fill that need. The fundamental shortcoming of the book is that the articles are overwhelmingly empty of information. To pick some examples at random:
Article 25 is "Counters". The article shows Verilog for several counter architectures (binary synchronous, Johnson, LFSR, and cascaded binary synchronous counters). A table lists resource consumption and maximum counting frequency for several implementations, apparently from the Xilinx synthesis tool on the counters alone. The table includes a counter based on a Xilinx multiply-accumulate block, with only a note that the counter is included. There just doesn't seem to be any need for this article, someone designing FPGA logic without knowing how to write a counter is not going to be rescued by this book.
Article 40 is "Estimating FPGA power consumption". The article has a short paragraph on each of 3 Xilinx tools for power estimation, huge screenshots, and results from using two of the tools to estimate power for a memory controller. The tool results show an almost 2:1 difference in estimated power (1.4W vs. 2.6W), accounted for by a more than 3:1 difference in estimated I/O power consumption. That is the end of the information. There is no discussion about how the designer might choose between the power estimates. After reading this 4.5 page article, you know only that three Xilinx tools are available, and that their power estimates can differ greatly.
Article 71 is "Serial and Parallel CRC". This article describes a method for converting a serial CRC generator to a parallel CRC generator. That method may be useful if you need it. The article appears to be very good.
Article 80 is "Design Area Optimizations: Coding Style". This article discusses several topics. The section 'Priority encoders' compares building a priority encoder using '?' operators vs. 'case'. The article explains that the 'case' approach may have better performance, and presents a table of synthesizer results for '?' vs. 'case'. The table shows logic utilization but leaves out timing information, so I do not know what to make of the performance tradeoff.
The book is physically bloated. The text is presented in a 12 point font instead of the usual 10 point, the Verilog samples and the Xilinx tool output are in a very wide 12 point typewriter font. The 5 page index would probably fit on 1 page with normal book design. I would call this a book with 75 pages of information, padded to 200+ pages, then doubled using large fonts and large screenshots.
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No deep coverage of the topics however the author points you to some internet resources.
The book covers the complete process of designing for FPGAs, from using the CAD tools to understanding FPGA architecture in a nutshell. I would strongly recommend this book, a large amount of pre-requisite knowledge is needed prior to reading this book. However, the book is up-to-date and should be on the bookshelf of all FPGA hardware engineers. Thank you Evgeni for a wonderful additional to my collection. :-)
But there is enough useful bits of information to still make it a worthwhile buy, and you can appreciate the condensed nature for that reason. For example had picked this up before doing a design where I wanted to use Partial Reconfiguration, and the quick introduction to it along with some information on the bitstream description chapter made my life a lot easier. Plus gives you some useful tools (such as the bitstream decoder for Virtex 5) on his website.
Would have liked to see more discussion around timing constraints, perhaps future versions will go in more depth!

