1-16 of 277 results for "asic design"

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ASIC Design in the Silicon Sandbox: A Complete Guide to Building Mixed-Signal Integrated Circuits

by Keith Barr | Dec 22, 2006

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Hdl Chip Design: A Practical Guide for Designing, Synthesizing & Simulating Asics & Fpgas Using Vhdl or Verilog

by Douglas J. Smith | Mar 1, 1998

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Architecting and Building High-Speed SoCs: Design, develop, and debug complex FPGA-based systems-on-chip

by Mounir Maaref | Dec 9, 2022

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Closing the Gap Between ASIC & Custom: Tools and Techniques for High-Performance ASIC Design

by David Chinnery and Kurt Keutzer | Jun 30, 2002

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An ASIC Low Power Primer

by Chadha | Dec 5, 2012

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Successful ASIC Design the First Time Through

by John P. and Mark W. Rosneck HUBER | Jan 1, 1991

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ASIC Design and Synthesis: RTL Design Using Verilog

by Vaibbhav Taraate | Jan 8, 2022

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Physical Design Essentials: An ASIC Design Implementation Perspective

by Khosrow Golshan | May 3, 2007

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Hardware Security: A Hands-on Learning Approach

by Swarup Bhunia Ph.D. Purdue University and Mark M. Tehranipoor Ph.D. | Nov 16, 2018

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The Art of Timing Closure: Advanced ASIC Design Implementation

by Khosrow Golshan | Aug 4, 2020

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Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ Physical Compiler™ and PrimeTime®

by Himanshu Bhatnagar | Dec 31, 2001

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ASIC System Design with VHDL: A Paradigm (The Springer International Series in Engineering and Computer Science, 75)

by Steven S. Leung and Michael A. Shanblatt | Jun 30, 1989

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ASIC/SoC Functional Design Verification: A Comprehensive Guide to Technologies and Methodologies

by Ashok B. Mehta | Aug 12, 2018

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Advanced ASIC Chip Synthesis: Using Synopsys® Design Compiler™ and PrimeTime®

by Himanshu Bhatnagar | Oct 23, 2012

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Constraining Designs for Synthesis and Timing Analysis: A Practical Guide to Synopsys Design Constraints (SDC)

by Sridhar Gangadharan and Sanjay Churiwala | Jun 23, 2015

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